XC4000 

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Application Notes Application Briefs Data Book

Data Sheets XCell Articles Other Links

Application Notes

Title	Size
XC4000X Series
XAPP056: System Design with New XC4000X I/O Features	70 KB
XAPP080: Supply Voltage Migration, 5V to 3.3V	30 KB
XAPP088: I/O Characteristics of the 'XL FPGAs	30 KB
XAPP107: Synopsys/Xilinx High Density Design Methodology Using FPGA Compiler	240 KB
Xilinx/Exemplar Large Device Design Methodology	400 KB
Xilinx/Synplicity High Density Methodology	140 KB
SelectRAM Memory
XAPP065: XC4000 Series Edge-Triggered and Dual-Port RAM Capability	50 KB
XAPP057: Using Select-RAM Memory in XC4000 Series FPGAs	210 KB
XAPP053: Implementing FIFOs in XC4000 Series RAM	230 KB
XAPP051: Synchronous and Asynchronous FIFO Designs	140 KB
XAPP052: Efficient Shift Registers, LFSR Counters,  and Long Pseudo-Random Sequence Generators	70 KB
Carry Logic & State Machines
XAPP013: Using the Dedicated Carry Logic in XC4000E	100 KB
XAPP023: Accelerating Loadable Counters in XC4000	30 KB
XAPP018: Estimating the Performance of XC4000E Adders and Counters	40 KB
XAPP014: Ultra-Fast Synchronous Counters	40 KB
Implementing State Machines in LCA Devices	30 KB
XAPP010: Bus-Structured Serial Input/Output Device	20 KB
XAPP009: Harmonic Frequency Synthesizer and FSK Modulator	20 KB
XAPP008: Complex Digital Waveform Generator	10 KB
Digital Signal Processing
16-Tap, 8-Bit FIR Filter	170 KB
Using Programmable Logic to Accelerate DSP Functions	190 KB
A Guide to Using Programmable Gate Arrays for Application-Specific DSP Performance	160 KB
XAPP054: Constant Coefficient Multipliers for the XC4000E	110 KB
XAPP055: Block Adaptive Filter	120 KB
Building High Performance FIR Filters Using KCMs	20 KB
The Fastest FFT in the West	70 KB
The Fastest Filter in the West	30 KB
Plug and Play ISA in Xilinx FPGAs	1.9 MB
Dynamic Microcontroller in XC4000	810 KB
Pulse Width Modulation in Xilinx	80 KB
XAPP062: Design Migration from XC4000 to XC4000E	60 KB
Configuration
XAPP079: Configuring Xilinx FPGAs Using an XC9500 CPLD and Parallel PROM	100 KB
XAPP091: Configuring Mixed FPGA Daisy Chains	20 KB
Configuring FPGAs Over a Processor Bus	530 KB
XAPP015: Using the XC4000 Readback Capability	60 KB
Other Applications
XAPP017: Boundary Scan in XC4000 and XC5200 Series Devices	110 KB
XAPP043: Improving XC4000 Design Performance	160 KB
XAPP045: XC4000 Series Technical Information	30 KB

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Application Briefs

Title	Size
XBRF001: XC4000E SelectRAM: Flexibility with Speed	20 KB
XBRF002: Low Power Benefits of XC4000E/X: Overview	30 KB
XBRF003: XC4000E SelectRAM: Maximum Configurability	20 KB
XBRF005: XC4000X Routing: A Comparison with XC4000E and ORCA	40 KB
XBRF007: XC4000 Series FPGAs: The Best Choice for Delivering Logic Cores	30 KB
XBRF014: A Simple Method of Estimating Power in XC4000XL/EX/E FPGAs	30 KB
XBRF015: Speed Metrics for High Performance FPGAs	100 KB

Data Sheets

Title	Size
XC4000XLA/XV Family	337 KB
XC4000XLA Pinouts	280 KB
XC4000XV Pinouts	240 KB
3.3 V and Mixed Voltage Compatible Products	30 KB

Data Book

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XCell Articles

Title	Issue
New XC4000X Series FPGAs - Doubling Gate Capacities and Delivering Industry-Leading Speed	Q4 '98
SECAD: PCI Reconfigurable Image Advanced Processor (PRIAP)	Q3 '98
XC4000XL FPGAs Interface to SDRAMs at 100 MHz	Q2 '98
How to Evaluate the XC4000XL for Your Next Application	Q2 '98
Cisco Systems: Using the XC4036XL	Q2 '98
The XC4013E: A Military "Bottom Line" Solution	Q2 '98
Low Power FPGA Achieves 400 MHz Performance	Q2 '98
The World's First 0.25 Micron FPGA Family	Q1 '98
The XC4000XV: Introducing the Industry's First 500K Gate FPGA Family	Q1 '98
A 200 MHz Pulse Generator	Q1 '98
High Performance Design - XC4000XL FPGAs Exceed 100 MHz	Q3 '97
Using Technology-Independent Intellectual Property: Are You Ready for 2 Million Gates?  Universal Serial Bus Case Study	Q3 '97
Implementing Median Filters in XC4000E FPGAs	Q4 '96
XC4000 Series SelectRAM Memory: Advantages and Uses	Q3 '96
Synchronous RAM Improves System Speed	Q4 '95
Synchronous RAM Timing in the XC4000E FPGA	Q4 '95
Advanced Carry Logic Techniques	Q2 '96
Distributed Arithmetic Laplacian Filter	Q1 '96
Manchester Decoder in 3 CLBs	Q2 '95
Examining XC4000E RAM Capabilities	Q3 '95

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Other Links

• XC4000E Family
• XC4000XLA Family
• XC4000XV Family