Summaries
XBRF001 
XC4000 Series SelectRAM: Flexibility with
Speed
The Xilinx XC4000 Series SelectRAM offers the best size flexibility
and at the same time offers high-speed operation with very little waste.
XBRF002
Low Power Benefits of XC4000E/X: Overview
The Xilinx XC4000E/EX/XL/XLA/XV families offer low-power architectures
which have been optimized for high-speed, high-density operation, giving
the customer reliable operation with many package options while satisfying
the need for very high performance designs. Xilinx devices consume
one-half to one-third the power of competitive devices.
XBRF003
XC4000 Series SelectRAM: Maximum Configurability
Detailed analysis shows that SelectRAM is the most silicon-efficient
implementation for FPGA memory. Due to the Dual-Port RAM capability
it also offers maximum bandwidth for most applications.
XBRF005
XC4000X Routing: A Comparison with XC4000E
and ORCA
The new XC4000X family (XC4000EX/XL/XLA/XV) includes large amounts
of new routing resources, necessary to support today's larger designs.
These resources are detailed and compared with the XC4000E, and with ORCA
devices from Lucent Technologies.
XBRF006
PLL Design Techniques and Usage in FPGA Design
This paper examines some general concepts concerning Phase Locked Loop
(PLL) usage and their application in programmable logic devices.
A critique of a newly-announced PLL implementation for FPGAs also is included.
XBRF007
XC4000 Series FPGAs: The Best Choice for
Delivering Logic Cores
Reusable logic cores provide an efficient means of embedding common
logic functions in high-density FPGA designs. The rich feature set
of the XC4000 Series FPGA devices makes them the ideal choice for core-based
system design.
XBRF011
An Alternative Capacity Metric for LUT-Based
FPGAs
As an alternative to "gate counting", the capacity of lookup-table-based
FPGAs can be measured more directly and objectively by examining the number
of available "logic cells".
XBRF014
A Simple Method of Estimating Power in XC4000XL/EX/E
FPGAs
A simple method is presented for estimating power dissipation in XC4000X
FPGAs. This method is targeted for early estimates during design
conceptualization before detailed design information is available.
XBRF015
Speed Metrics for High Performance FPGAs
Performance data (in terms of circuit speed) is provided for several
key logic and routing functions implemented in XC4000XL-09 FPGAs, for purposes
of overall system performance estimation. Performance data also is
provided for equivalent implementations in the Altera Flex 10K-2 family
devices.
XBRF017
XC9500XL Versus MAX7000A Architecture Comparison
This discussion focuses on comparing the Xilinx XC9500XL CPLD family
with the Altera MAX7000A (including MAX7000AE) family. Both families
address the high speed 3.3V ISP CPLD marketplace, where developments in
low voltage systems demand new solutions from CPLDs. The newer XC9500XL
architecture may be viewed as a functional superset of the older MAX7000A
base architecture, and it provides more architectural flexibility, more
logic resources, and higher level of quality and reliability for 3.3V systems.
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