Xilinx Reed-Solomon Solution

The Basics of Reed-Solomon Reed-Solomon is a type of Forward Error Correction (FEC) commonly used in data transmission and storage applications, such as wireless communication units, DSL modems, Digital TV, RAID, DVB and DVD products. By adding redundancy before data transmission and storage, a Reed-Solomon codec (encoder/decoder) can detect and correct errors for blocks of data. There are many different standards that are used in different applications, for example DVB, ATSC, and IESS-308.

Core Features
High-speed compact Reed-Solomon Decoder and Encoder Automatically configured from user parameters (demo Decoder/Encoder) Supports all major coding standards and custom implementations Available for Virtex/-E, Spartan-II, Spartan/-XL, XC4000 Downloadable over the Internet gives instant access to latest releases Incorporates Xilinx Smart-IP Technology for design predictability	Jointly developed with a Xilinx AllianceCORE partner

Xilinx Smart-IP Technology

The definition for Xilinx Smart-IP technology is a combination of: Xilinx FPGA architecture with segmented routing and distributed as well as block memory, which makes it well tailored to core implementation Xilinx software and core features allowing predetermined placement and routing The result is predictable design implementation where performance and functionality are consistent independently of core placement, number of cores used, surrounding user logic, device size, and used EDA tools. Xilinx Smart-IP Technology is vital for successful system-on-a-chip designs.

Implementation Example Features Typical Reed-Solomon ASSP The Xilinx Reed-Solomon in Spartan-II Polynomial Fixed Parameterizable Symbol Width Fixed Parameterizable Block Length Programmable (3 - 255) Parameterizable (3 - 4095) Correctable Errors Programmable (1 - 10) Parameterizable (1 - 64) Erasure Handling Fixed Parameterizable Maximum Throughput 12.5 Mbytes/sec Decoder: 62 Mbytes/sec* Encoder: 108 Mbytes/sec* Latency 1181 cycles 418 cycles* Cost $20 $9.95 *º * With core configuration comparable to listed ASSP example. º Cost based on 250K resale price for XC2S100

Ordering information Part number Product Description Supported Devices DO-DI-RSE Reed-Solomon Encoder Virtex-E, Virtex, Spartan-II, Spartan/-XL, XC4000 DO-DI-RSD Reed-Solomon Decoder Please contact your local Xilinx Sales Office for pricing information or to place an order. Xilinx LogiCORE Reed-Solomon Products are provided under Xilinx standard LogiCORE Reed-Solomon license agreement. Additional Information to view the PDF files on this page. Frequently asked questions Press release, February 7, 2000 LogiCORE Reed-Solomon Decoder data sheet LogiCORE Reed-Solomon Encoder data sheet Reed-Solomon Decoder configuration demo* Reed-Solomon Encoder configuration demo* Reed-Solomon Glossary (Xilinx at Work) The Xilinx IP-Center Information on Xilinx FPGAs Additional Spartan-II Information Xilinx at Work - Reed-Solomon in Spartan-II * Note that a browser that supports the JDK1.1.5 version of Java, such as Netscape Communicator 4.5 or later, is required to view the core generation GUI's. Netscape Communicator 4.5 or later may be downloaded from here. Java must be enabled in the browser preferences.