ABEL
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Advanced Boolean Expression Language. ABEL version 7.2 is provided in all versions of Foundation ISE.
CORE Generator
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The Xilinx CORE Generator system generates and delivers parameterizable
cores optimized for Xilinx FPGAs.
Engineer Schematic Capture (ECS)
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Foundation ISE schematic editor used for top level block diagrams.
EDIF
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Electronic Design Interchange Format. An industry standard netlist
format.
FPGA Express 3.4
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Synopsys VHDL and Verilog compiler
included with Foundation ISE 3.1i.
HDL
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Hardware Description Language.
HDL Bencher
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HDL Bencher automates VHDL and Verilog test bench development.
During the import process the unit under test is selected, timing
parameters are set, and an initial waveform is automatically created.
HDL Bencher is provided by Visual Software Solutions.
HDL Editor
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The Foundation ISE HDL Editor for ABEL, Verilog and VHDL. The HDL Editor
also provides language specific color coding, access to the language templates, and
error navigation.
IEEE (pronounced "I triple-E")
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Institute of Electrical and Electronics Engineers.
Logiblox
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Blocks of Logic Optimized for Xilinx for M1. A GUI-based tool where generic
bus-width-independent symbols such as counters, adders, and data registers
are used to implement architecture-optimized functions.
Modelsim Simulator
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Foundation ISE provides direct integration to all versions of the
Modelsim Simulator.
NPL file
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The NPL file contains library, source file, options, and other project-specific
information.
Project Navigator
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The Project Navigator guides the user through the design flow and manages
source files.
StateCad
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StateCAD automates state machine development in VHDL and Verilog. Using the FSM
wizard, complex, concurrent state machines are specified. Random logic and
Mealy/Moore outputs are added to complete the design.
StateCad is provided by Visual Software Solutions.
Verilog
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VHSIC Hardware Description Language. An industry standard
(IEEE 1364) HDL. Recognizable
as a file with a .V extension.
VHDL
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VHSIC Hardware Description Language. An industry standard
(IEEE 1076.1) HDL. Recognizable
as a file with a .VHD extension.
VHSIC
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Very High Speed Integrated Circuit.
XST
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Xilinx Synthesis Technology
is provided with all versions of Foundation ISE.
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