The Quarterly Journal for 
Xilinx Programmable Logic Users
XCell 21, Second Quarter, 1996 

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If you would like a hard copy subscription, use the literature request form.  If you have comments, suggestions, or would like your design featured in XCell, e-mail editor@xilinx.com. 

In this Q2 '96 issue... 

Customer Success Story: FPGAs Go "Down Under" in an ISDN Terminal Adapter 
HDL Synthesis and Built-In Clock Enables 
Ten Digit Fully Synchronous BCD Counter Runs at 87 MHz 
A Look at "Minimum" Delays 
Visit comp.arch.fpga - The FPGA Newsgroup 
Advanced Carry Logic Techniques 
PCI Based Reconfigurable Computers