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Virtex-II Pro Platform FPGA Handbook
Virtex-II Pro Platform FPGA Handbook
What's New
Success Stories
PDF File
About This Handbook
97KB
Introduction to the Virtex-II Pro Platform FPGA Family
83KB
Part 1: Virtex-II Pro Data Sheet
Virtex-II Pro Data Sheet
Part 2: Virtex-II Pro User Guide (version 1.0):
(
Entire User Guide
)
7.85MB
Chapter 1: Timing Models
365KB
Chapter 2: Design Considerations
(includes chapter subsections below)
2.10MB
Rocket I/O Transceiver
175KB
Processor Block
157KB
Using Global Clock Networks
176KB
Using Digital Clock Manager (DCM)
874KB
Using Block SelectRAM Memory
316KB
Using Distributed SelectRAM Memory
113KB
Using Shift Register Look-Up Tables
98KB
Designing Large Multiplexers
95KB
Designing Sum of Products (SOP)
75KB
Using Embedded Multipliers
92KB
Using Single-Ended SelectI/O Resources
262KB
Using Digital Controlled Impedance (DCI)
153KB
Using DDR I/O
142KB
Using LVDS I/O
99KB
Using Bitstream Encryption
97KB
Using the CORE Generator System
326KB
Download all VHDL Templates and Sub-Modules
(zip file)
89KB
Download all Verilog Templates and Sub-Modules
(zip file)
72KB
Chapter 3: Configuration
454KB
Chapter 4: PCB Design Considerations
(includes subsections below)
2.85MB
Pinout Information
122KB
Pinout Diagrams
742KB
Package Specifications
452KB
Flip-Chip Packages
38KB
Thermal Data
64KB
Printed Circuit Board Considerations
195KB
Board Routability Guidelines
1.23MB
XPower
38KB
IBIS Models
420KB
IBIS Files (web site)
BSDL and Boundary Scan Models
51KB
BSDL Files (web site)
Appendix A: BitGen and PROMGen Switches and Options
141KB
Appendix B: XC18V00 Series PROMs
PROM Package Specifications
139KB
XC18V00 Series PROM Data Sheet
181KB
Glossary
209KB
Virtex-II Pro FPGAs
Rocket I/O User Guide (PDF)
PPC405 User Manual (PDF)
PPC405 Processor Block Manual (PDF)
Application Notes
Reference Designs
Virtex-II Pro FPGA Package Files
Virtex-II Pro FPGA IP Solutions
Chipscope Pro Verification and Debug