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In this Q3 '99 issue...
From
the Editor: Xilinx Online - Putting Things in Perspective 105KB
Xilinx Online - A Revolution in Logic Design 47KB
Xilinx Receives Three IRL Industry Awards 26KB
Xilinx Acquires CoolRunner Line of CPLDs 47KB
Xilinx Design Series Text Books 32KB
How to Add Features and Fix Bugs - Remotely 19KB
Low-cost Spartan FPGAs Used in ADSL Modems 97KB
Unusual Clock Dividers 53KB
New EDIF Netlist Controls 52KB
Who's Using Virtex and Spartan FPGAs in Xilinx Online Applications? 98KB
Voice Technologies Group Creates Adaptable Network Interface 30KB
The Evans & Sutherland Ensemble Image Generator 59KB
New 2.1i Software - Shortens Design Cycles, Improves Productivity 205KB
WebFITTER - Now Better Than Ever 52KB
New WebPACK - Packs a CPLD Punch 90KB
Get a Head Start with a New Virtex Development Board 45KB
Advanced Chip Scale & BGA Packaging 95KB
32-Channel (Duplex) ADPCM Transcoder for Virtex FPGAs 19KB
FlibGen, FlibTime, and ChipView - Power Tools for FPGA Design 83KB
New FPGA Compiler II - For Million-Gate Designs 135KB
FPGA-on-Board Timing Verification Using Tau 133KB
Web-integrated Software Manuals 86KB
Industry Leaders Discuss the Role of the Internet and Programmable Logic 64KB
The Virtex Family - a Powerful ASIC Alternative 59KB
The
Long-term Industry Outlook 64KB
Verilog
GSR/GTS Simulation Methodology - Changes in the Alliance Series 2.1i Software
29KB
Questions
& Answers - From the Xilinx Applications Engineering Staff 115KB
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Cover Story