|
| Number | White Paper Description | Product |
|
| WP100 |
Xilinx
at Work in Set-Top Boxes |
CPLDs,
Spartan-II |
| This White Paper gives an overview
of different set-top box technologies and how Xilinx high volume
programmable devices can be used to implement complex system
level glue in a variety of set-top box designs. It concentrates
on set-top box technology used to receive television over satellite,
cable and terrestrial channels. |
|
| WP102 |
Xilinx
at Work in Digital Printers |
CPLDs,
Spartan FPGAs |
| This white paper focuses on
the market size for the various printer technologies, both by
performance and geographic region. It then discusses the basics
of the technologies, to give a view of their capabilities, limitations
and future directions. It will then focus on exactly where Xilinx
XC9500XL CPLDs and Spartan FPGAs play a vital role in this important
market, then take a look into the future direction it is headed
with Internet influence and the new photographic quality printers
and MFPs. |
|
| WP103 |
Xilinx
High Volume Programmable Logic Applications in Internet Audio
Players |
CPLDs,
Spartan FPGAs |
| This paper provides an overview
of Internet audio technologies and how Xilinx high-volume programmable
devices can be used to overcome some of the significant challenges
facing the designers of portable players. The Xilinx device
families targeted at these high-volume applications include
CoolRunner™ CPLDs and Spartan™ FPGAs. |
|
| WP105 |
CoolRunner
XPLA3 CPLD Architecture Overview |
CoolRunner XPLA3 CPLDs |
| This document describes the
CoolRunner™ XPLA3 CPLD architecture. |
|
| WP106 |
The
Spartan-II Family — The Complete Package |
Spartan-II |
| The Spartan™-II Family,
Combined with a Vast Soft IP Portfolio is the First Programmable
Logic Solution to Effectively Penetrate the ASSP marketplace.
Spartan-II offer more than 100,000 system gates at under $10
and are the most cost-effective PLD solution ever offered. They
build on the capabilities of the very successful Virtex family
and supports all the associated features, including SelectIO™,
BlockRAM™, Distributed RAM, DLLs, and support clock speeds
up to 200 MHz. Spartan-II extends the Spartan family focus in
competing against ASICs and is uniquely poised to penetrate
the ASSP marketplace. |
|
| WP107 |
Inverse
Multiplexing for ATM (IMA) Solutions with Spartan-II |
Spartan-II |
| Early deployment of IMA technology
meeting the IMA v1.0 standard began in late 1997 but due to
different interpretations of this specification, true multi-vendor
interoperability was not really possible until the completion
and acceptance of the IMA v1.1 specification in 1999. With the
introduction of the Spartan-II family of devices and the IMA-8
and other Xilinx based IMA core solutions, an FPGA based IMA
implementation is simple and economical. |
|
| WP108 |
CoolRunner
XPLA3 Clocking Options |
CoolRunner XPLA3 CPLDs |
| This document gives a detailed
description of the CoolRunner XPLA3 clocking options. |
|
| WP109 |
HDLC
Controller Solutions with Spartan-II |
Spartan-II |
| Using the Spartan™-II
Family in combination with a Soft IP to effectively penetrate
the HDLC Controller market in place of the traditional ASSP. |
|
| WP110 |
Reed-Solomon
Solutions with Spartan-II |
Spartan-II |
| This paper explains the theory
behind Reed-Solomon error correction, and discusses how a variety
of practical Reed-Solomon encoding/decoding solutions can be
implemented using Xilinx Spartan™-II family FPGAs. |
|
| WP111 |
Spartan-II
Family as a Memory Controller for QDR-SRAMs |
Spartan-II |
| The explosive growth of the
Internet is boosting the demand for high-speed data communication
systems. In order to increase memory bandwidth significantly
for future high-performance communication applications, Cypress
Semiconductor, Integrated Device Technology, Inc. and Micron
Technology have jointly defined and developed a new SRAM architecture
referred to as the Quad Data Rate™ (QDR™) SRAM technology.
FPGAs are ideal to implement the control and interface logic,
which ties the CPUs to the QDR SRAMs. The Spartan™-II FPGA,
with its unique and extensive features is an ideal memory controller
interface for the QDR SRAM. Spartan-II offer more than 100,000
system gates at under $10 and are the most cost-effective programmable
logic devices (PLD) solution ever offered. |
|
| WP114 |
High-performance
Spartan-II 8-bit Microcontroller Solution |
Spartan-II |
| Using the Spartan™-II
Family in combination an 8-bit microcontroller Soft IP to effectively
penetrate Industrial instruments and Consumer Applications.
This white paper presents a brief history, the market space
for 8-bit microcontrollers, the Spartan-II 8-bit microcontroller
solutions, 8051 IP solutions, applications and the Spartan-II
FPGA advantage. |
|
| WP115 |
Data
Encryption using DES/Triple-DES Functionality in Spartan-II |
Spartan-II |
| Today's connected society
requires secure data encryption devices to preserve data privacy
and authentication in critical applications. There is an immense
value in integrating critical IP solutions like Discrete Cosine
Transform/Inverse DCT (DCT/IDCT) and DES within a Xilinx Spartan-II
FPGA to enhance performance and security in communication applications.
|
|
| WP116 |
Xilinx
Spartan-II FIR Filter Solutions |
Spartan-II |
| Traditionally, digital signal
processing (DSP) algorithms are implemented using general-purpose
programmable DSP chips for low-rate applications. Alternatively,
special-purpose, fixed function DSP chipsets and application-specific
integrated circuits (ASICs) are used for high-performance applications.
Technological advancements by Xilinx in Field Programmable Gate
Arrays (FPGAs) in the past 15 years have opened new paths for
DSP design engineers. The most common digital building blocks,
like serial peripherals, DMA controllers, PCI controllers, and
synthesizable processors, are all readily realizable using a
Spartan-II device. In fact, all the most basic operations performed
by analog or digital electronic devices—filtering, amplification,
modulation, storage, and computation—can be implemented
with Spartan-II. |
|
| WP118 |
Using
CoolRunner CPLDs in Smart Card Reader Applications |
CoolRunner XPLA3 CPLDs |
| This document presents the
different types of smart cards and their applications and discusses
the variety of smart card readers available and what functions
they can perform. An illustration of the elements that form
a typical smart card reader and how and where CoolRunner devices
can be used to undertake some of these tasks is described herein. |
|
| WP120 |
Xilinx
High-Volume Programmable Logic Applications in Satellite Modem
Designs |
CPLDs
Spartan FPGAs |
| This paper provides an overview
of satellite modem technologies and standards, and discusses
how the Internet is driving the deployment of this technology.
The Xilinx device families targeted at these high volume applications
include XC9500 CPLDs and Spartan &#reg; -II FPGAs. |
|
| WP122 |
Using
the CoolRunner XPLA3 Timing Model |
CoolRunner XPLA3 CPLDs |
| This document describes how
to use the CoolRunner &#reg; XPLA3 timing model. |
|
| WP123 |
Using
FPGAs with ARM Processors |
FPGAs |
| This white paper discusses
interfacing Xilinx FPGAs with off-the-shelf ARM processors.
It covers some of the available ARM Application Specific Standard
Products (ASSPs) and describes some of the Xilinx plus ARM development
systems currently available for engineers to evaluate. Techniques
and features that improve design performance are also included
to help achieve maximum throughput. |
|
| WP124 |
Xilinx
at Work in Digital Modems |
CPLDs,
Spartan FPGAs |
| This white paper gives an
overview of digital modem technologies and how Xilinx high volume
programmable devices can be used to implement complex system
level glue in digital modem designs. |
|
| WP125 |
Xilinx
at Work in ISDN Modems |
CPLDs,
Spartan FPGAs |
| This white paper gives an
overview of ISDN modem technologies and how Xilinx high volume
programmable devices can be used to implement complex system
level glue in ISDN modem designs. |
|
| WP127
|
Embedded System Design Considerations |
Virtex-II |
| Embedded systems see a steadily increasing bandwidth mismatch between raw processor
MIPS and surrounding components. System performance is not solely dependent upon
processor capability. While a processor with a higher MIPS specification can provide
incremental system performance improvement, eventually the lagging surrounding
components become a system performance bottleneck. This white paper examines some of
the factors contributing to this. |
|
| WP128 |
Introduction
to Home Networking |
Spartan-II |
| Once connected, consumers
find innumerable uses for their home networks. Home networking
is really a three part equation offering entertainment, information,
and automation services that are distributed between appliances
in the home. |
|
| WP129 |
Introducing Xilinx and Programmable Logic Solutions for Home
Networking |
Spartan-II |
| Xilinx has been successful
in the communications and networking markets because of the
dynamics in these markets. The eSP: Home Networking program
helps system designers and ASIC/FPGA designers understand the
technology and market dynamics to make the right decisions in
this marketplace. |
|
| WP130 |
Broadband
Access |
Spartan-II |
| The Internet continues to
expand at an enormous rate, and the worldwide modem market will
continue to be buoyed by this growth as the default solution
for residential Internet access. Cable and xDSL modems will
continue their strong movement into the residential marketplace.
Today, applications such as Internet access and high-speed remote
access to storage media require more data capacity than traditional
telecommunications services can provide. Replacing copper wiring
with fiber optic cabling is one way of delivering this capacity
to your home, but the associated technology is expensive. |
|
| WP131 |
Media (Residential) Gateways |
Spartan-II |
| The primary function of the
media gateway is to provide broadband connectivity to the home
through cable, xDSL, satellite, and wireless. Secondly, media
gateways will provide home networking capabilities by distributing
broadband access throughout the home using technologies such
as HomePNA (phonelines) or wireless LANs. The demand for greater
Internet bandwidth is driving the need for digital modem solutions.
This white paper looks at utilizing an existing PC to provide
media gateway type services. Companies like IBM and Ericsson
are strongly promoting this concept. |
|
| WP132 |
Information (Internet) Appliances2 |
Spartan-II |
| Market researchers predict
that information appliances will out-ship consumer PCs by 2002
in the U.S. High-volume information appliances will be products
such as digital TV, DVD players, digital cameras, and handheld
devices. Semiconductors enable new devices and players, but
technology is increasingly becoming invisible. Xilinx programmable
logic products (Spartan™-II FPGAs, CoolRunner™, and
9500 CPLDs) ported with intellectual property (IP) provide solutions
like ASSPs, but with increased flexibility. FPGA logic not used
from the IP can be programmed with other IP cores—such
as embedded solutions. Other features within the Spartan-II
provide system integration, and the reprogrammability enables
time-to-market and flexibility at low costs. Xilinx Online™
allows time-in-market as specifications in emerging technologies
keep evolving. |
|
| WP133 |
Home Networking Using “No New Wires“ Phoneline and
Powerline Interconnection Technologies |
Spartan-II |
| In the context of a home networking
environment, “no new wires“ is the term applied to
a suite of technologies that use existing wiring systems to
distribute high-speed data and video throughout your house.
Phoneline and powerline systems are the two dominant “no
new wires“ technologies. |
|
| WP134 |
Home Networking Using “New Wires“ — IEEE 1394,
USB, and Fast Ethernet Technologies |
Spartan-II |
| With the proliferation of
digital television more and more people around the world are
beginning to distribute audio and video signals around their
homes. For the home networking purists, Ethernet equipment offers
inexpensive and proven products that can be bought at retail
in both kit form or a la carte. Ethernet technology can reliably
and efficiently network all the Internet appliances (PCs, printers,
game consoles, digital televisions, security cameras, and much
more) at home. Xilinx solutions enable these evolving technologies
in consumer devices today. |
|
| WP135 |
Wireless Home Networks — DECT, Bluetooth, HomeRF, and Wireless
LANs |
Spartan-II |
| A wireless home network is
an intriguing alternative to phoneline and powerline wiring
systems. Wireless home networks provide all the functionality
of wireline networks without the physical constraints of the
wire itself. They generally revolve around either IR or radio
transmissions within your home. Radio transmissions comprise
of two distinct technologies—narrowband and spread-spectrum
radio. Most wireless home networking products are based upon
the spread-spectrum technologies. To date, the high cost and
impracticality of adding new wires have inhibited the wide spread
adoption of home networking technologies. Wired technologies
also do not allow users to roam about with portable devices.
In addition, multiple, incompatible communication standards
have limited acceptance of wireless networks in the home. |
|
| WP136 |
Home Networking Middleware |
Spartan-II |
| This white paper presents
an overview of how home networking middleware supports the seamless
convergence of broadcast and home network applications. The
fusion between both of these technologies facilitates the deployment
of a range of new entertainment services within the home. UPnP
leverages Internet and Web components (like IP, TCP, UDP, HTTP,
and XML) and enables seamless proximity networking in addition
to control and data transfer among networked appliances in the
home, office, and everywhere else. |
|
| WP137 |
Intellectual Property (IP) Cores for Home Networking |
Spartan-II |
| Spartan™-II FPGAs, programmed
with IP cores, enable home networking products. Xilinx develops
IP cores and partners with third-party IP providers to provide
customers with a suite of cores to decrease the customer's time-to-market.
W While reprogrammability reduces the customer's time-to-market
and enables flexibility, the Xilinx Online™ program allows
time-in-market as specifications in emerging technologies keep
evolving. |
|
| WP138 |
Voice-Data Convergence—Voice Over IP |
Spartan-II |
| This paper gives an overview
of voice-data convergence technologies and how Xilinx high volume
programmable devices can be used to overcome some of the significant
challenges facing the designers of these systems. The Xilinx
products targeted at these high-volume applications include
XC9500XL™ and CoolRunner™ CPLDs and Spartan™-II
FPGAs. This appendix starts with an overview of voice-data convergence
technologies and the benefits they bring to the users. We will
then describe the product architectures that are used to implement
VoIP gateways and IP phones. The final topic will be to show
how Spartan-II devices can be used in these applications. |
|
| WP139 |
FPGA Enabled Home Networking Technology Bridges—Connecting
Disparate Technologies |
Spartan-II |
| The digital age of consumer
electronics is here and it is bringing with it faster computing
at lower costs. The Internet revolution and distribution of
broadband access to different digital consumer electronics and
their interoperation introduces a new wave of technology into
your home. Home networking involves distribution of audio, video,
and data around the home and ensures interoperability between
various information appliances in your home. Home networking
has four aspects, which include broadband access, residential
gateways, a vast range of information appliances, and the technologies
that bind them all—interconnectivity or home networking
technologies. |
|
| WP140 |
Physical
Synthesis |
Spartan-II |
| In the domain of deep submicron
(DSM) and nanometer ASIC technologies (180 nm and below), the
traditional separation between logical (synthesis) and physical
(place and route) design methods often causes a problem—designs
cannot meet their realistic timing objectives; creating the
well known “timing closure problem.“ Timing closure
is now considered the biggest area of difficulty for ASIC performance-oriented
designs. The underlying reason is that circuit delays are dominated
by net delays, which are influenced by the placement of the
cells. The traditional fanout-based wireload models, for estimating
interconnect delay during synthesis, are considered inaccurate
and are the key factor causing the lack of timing predictability
between post synthesis and post layout results. It is evident
that synthesis and placement technologies must merge to create
properly placed and routable designs that meet realistic performance
goals. |
|
| WP141 |
UART
to PCMCIA Bridging for Bluetooth |
Spartan-II |
| A Xilinx based fast UART to
PC Card (PCMCIA) bridging solution is the ideal mechanism for
integrating industry standard Bluetooth communications into
legacy systems. Such a solution can be realized quickly, can
leverage a wide variety of low cost Bluetooth components, and
can be optimized to impose a minimal impact on the host system
implementation and performance. The result is a cost effective
solution, fast time-to-market, and preservation of host MIPS
for the primary device application. |
|
| WP142 |
UART to PCI Bridging for Bluetooth Applications |
Spartan-II |
| A Xilinx UART (Universal Asynchronous
Receiver and Transmitter) to PCI (Peripheral Component Interconnect
bus) bridging solution is ideal to integrate the emerging Bluetooth
communications standard into legacy systems. It leverages a
wide variety of low-cost Bluetooth components, and can be quickly
implemented and optimized to ensure minimal impact on host system
performance. The result is a fast-to-market, cost effective
solution that preserves host MIPS for the primary device application.
|
|
| WP143 |
Xilinx Generic Flash Memory Interface Solutions |
Spartan-II |
| This white paper shows how
a generic flash memory interface can be combined with Xilinx
IP interface cores to add flash memory to Xilinx Spartan device
designs. |
|
| WP145 |
UART to Powerline Bridging for Bluetooth |
Spartan-II |
| This white paper shows how
a generic flash memory interface can be combined with Xilinx
IP interface cores to add flash memory to Xilinx Spartan device
designs. |
|
| WP146 |
UART
to 1394 Bridging for Bluetooth |
Spartan-II |
| The distribution of video,
audio, and PC data has evolved using a variety of different
networking technologies. Various factors drive these applications
including cost, performance, quality of service required, regulatory
issues, geographic building trends, etc. Therefore, Ethernet,
IEEE 1394, Bluetooth, USB, HomePNA, HomePlug, HomeRF, HiperLAN2,
and Wireless LAN are available to network homes and/or small
offices. Each one of these technologies has its own pros and
cons and is suitable for specific applications. |
|
| WP148 |
The ABC's of 2.4 and 5 GHz Wireless LANs |
Spartan-II |
| The enterprise, SOHOs, and
homes are demanding mobility and portability with high-bandwidth
data, voice, and video access. This has led to the introduction
of wireless LAN technologies, which attempt to provide exactly
that. In the 2.4 GHz frequency band, IEEE 802.11b is “the“
wireless LAN solution in the market. However the 5 GHz frequency
has two possible contending technologies — IEEE 802.11a
and HiperLAN2. This white paper explains the state of affairs
in the wireless LAN market, the underlying technology behind
the different types of wireless LANs, the over-utilized 2.4
GHz spectrum, the migration to 5 GHz band, which technology
will succeed, and how Xilinx Spartan-II are ideal for this market
place. |
|
| WP150 |
Solving the Challenges for Terabit Networking and Beyond |
Global Services |
| In today's world of modular
networking and telecommunications design, it is becoming increasingly
difficult to keep alignment with the many different and often
changing interfaces, both inter-board and intra-board. Each
manufacturer has their own spin on the way in which devices
are connected. To satisfy the needs of our customers, we must
be able to support all their interface requirements. For us
to be able to make products for many customers, we must adopt
a modular approach to the design. This modularity is the one
issue that drives the major problem of shifting our bits from
one modular interface to another. |
|
| WP151
|
System Ace: Configuration Solution for Xilinx FPGAs |
Configuration Solutions |
| Design techniques for electronic
systems are constantly changing. In industries at the heart
of the digital revolution — telecommunications, networking,
and wireless communications — this change is especially acute.
Functional integration, dramatic increases in complexity, new
standards and protocols, and increased time-to-market pressures
have bolstered both the design challenges and the opportunities
in architecting modern electronic “boxes.” One trend driving
these changes is the increased integration of core logic with
previously discrete functions to achieve higher performance
and more compact board designs. Traditionally, ASICs have been
the vehicle for such integration but now, with their advanced
system capabilities, programmable logic devices (PLDs), especially
field programmable gate arrays (FPGAs), have begun to take on
this role in system design. |
|
| WP152
|
Xilinx FPGA Configuration Data Compression and Decompression |
Configuration Solutions |
| This document provides a brief
description of the Xilinx bitstream compression algorithm based
on the LZ77 scheme. FPGA configuration files can be compressed
by Xilinx-developed software to reduce memory storage requirements.
Compressed configuration files can be stored in a high-density
System ACE MPM FPGA configuration controller. The System ACE
MPM controller decompresses the files and shifts the original
configuration data to the target FPGAs. |
|
| WP153
|
Reconfigurable Vehicles |
Spartan-IIE |
| This paper will focus on how Xilinx enables the
automobile to be a more entertaining, more
informative, and a more productive environment.
When we envisage automotive electronics we
automatically consider electric windows, central
locking systems, safety systems, climate control and
electronic ignition systems, all of which require
stringent qualification, temperature cycling, and
certification. The new emerging automotive
electronics boon has now shifted from under the
hood or bonnet to in-cabin multimedia applications.
The trend towards mobile offices and entertainment
on the move has meant a large portion of the
electronic or semiconductor content has moved into
this expanding area. |
|
| WP155
|
Triple DES Encryption in Selected Virtex-II Devices |
Virtex-II |
| This white paper describes Triple DES Encryption
for certain Virtex™-II devices. Review the white paper for more details. |
|
| WP156
|
High-Speed Transceiver Logic (HSTL) |
Virtex |
| HSTL is a technology-independent interface
standard for digital integrated circuits. It is a JEDEC
standard developed for voltage scalable and
technology independent I/O structures. The I/O
structures required by this standard are differential
amplifier inputs (with one input internally tied to a
user-supplied input reference voltage, VREF for
single-ended inputs) and outputs using output
power supply inputs (VCCO) that may differ from
those operating the device itself. |
|
| WP157
|
Usage Models for Multi-Gigabit Serial Transceivers |
Virtex-II |
| This document provides an overview of the various
usage models for high-speed, point-to-point, serial
transceiver technology. While not intending to
represent all the applications of this technology, it
provides a basic categorization and description of
some of the most common uses. |
|
| WP160
|
WP160 Emulating External SERDES Devices with Embedded Rocket I/O Transceivers |
Virtex-II Pro |
| The Virtex-II Pro™ Platform FPGA provides an
attractive single-chip solution to serial transceiver
design problems that previously required multiple
devices. This white paper describes several different
dedicated external SERDES devices, and presents
alternative design solutions using the Virtex-II Pro
Platform FPGA with Rocket I/O™ transceivers. |
|
| WP161
|
Comparing Virtex-II and Stratix Logic Utilization |
Virtex-II |
| New programmable logic circuits provide an evergrowing
set of architectural elements. Advanced
FPGAs are not solely made of look-up tables and
flip-flops anymore, and today's logic fabrics are best
described as “feature rich.” This trend requires
sophisticated algorithms in both synthesis and
implementation tools to provide optimal
performance and logic utilization by leveraging
these new hardware features. This document
highlights how the Xilinx Virtex™-II family provides
25% better logic utilization compared to Altera®’s
Stratix™ device family as a result of fabric features
and advanced software algorithms. |
|
| WP162
|
Multiprocessor Systems |
Virtex-II Pro |
| With the availability of the Virtex-II Pro™ devices
containing more than one PowerPC processor and
MicroBlaze™ and PicoBlaze™ soft processor cores, it
is important to understand the basics of
multiprocessor systems. This document provides a
background for building true multiprocessor
systems. It is by no means a comprehensive
discussion on the topic of multiprocessing. For more
information see Parallel Computer Architecture by
Culler and Singh, with Gupta. |
|
| WP163
|
Synthesis Tool Enhancements for Virtex Architectures |
Virtex-II |
| With the advent of platform FPGAs, programmable
logic circuits provide an ever-growing set of
architectural elements. Days when FPGAs were
simply made of LUTs and flip-flops are long gone.
Now FPGA fabric is "feature rich" and flexible.
Sophisticated synthesis tools are required to further
improve performance and logic utilization using
these new architecture capabilities. This document
presents some critical areas where Xilinx is actively
working with synthesis partners to improve quality
of results (QoR) while, at the same time, keeping
design and verification processes as simple as
possible. |
|
| WP164
|
IBM Licenses Embedded FPGA Cores from Xilinx for Use in SoC ASICs |
FPGAs |
| IBM and Xilinx recently announced a license
agreement to develop programmable logic cores for
use within the next generation IBM “Cu-08” ASIC
product — this is a crucial link in the on-going quest
for system-level integration. This collaboration to
offer designers high-performance ASIC technology,
with state-of-the-art programmable logic, opens a
vast potential for new applications and the ultimate
in both integration and flexibility. This development
expands the growing relationship between these two
leading technology companies. Both are ranked #1 in
their product markets by Dataquest, where IBM has
captured the #1 ASIC supplier ranking for 3
successive years, and Xilinx has similarly held the
top FPGA supplier position. |
|
WP167
 |
Field Programmable Controllers
for Cost Sensitive Applications |
MicroBlaze |
| The Xilinx Field Programmable Controller (FPC)
solution allows you to create low-cost, customized
processors with peripherals, memory, and logic —
all on a single cost-optimized Spartan™-IIE FPGA.
The FPC solution is ideal for applications in which
cost and integration within a system is critical. With
the flexibility to allow integration of other IP on the
FPGA fabric, the Spartan-IIE family presents an ideal
embedded solution. This white paper presents the
end markets, FPC solution, and its associated tools,
end applications, and the Spartan-IIE performance
advantage. |
|
| WP169
|
Synthesis Tool Enhancements for Virtex Architectures |
Automotive |
| Obsolescence is a concern of most design engineers
and none more so than with automotive telematics
equipment designers.Even though automotive
electronics equipment design and development time
scales have shrunk recently rom 5 to 2 years, the
products themselves will still need to be produced
for many years and be active in the ield or even
longer. |
|
| WP170
|
Synthesis Tool Enhancements for Virtex Architectures |
CoolRunner-II |
| This white paper will discuss the features of Complex
Programmable Logic Devices (CPLDs) in general, and
CoolRunner-II devices specifically, that lend validity to
some of these claims. It will cover the basics of tamper
resistance as well as detail some of the more interesting
data-attack methods. Describing the technical value of
CoolRunner-II CPLDs in hindering these attacks, it will
conclude by summarizing the degree of safety provided by
the use of CoolRunner-II devices and outlining additional
defensive steps that can help to ensure data security. |
|
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