-------------------------------------------------------
--  BIDIR_INFER.VHD Version 1.0                      --
--  Example of inferring a Bi-directional pin        --
--  August 1997                                      --
-------------------------------------------------------

Library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity bidir_infer is

    port (DATA :       inout STD_LOGIC_VECTOR(1 downto 0);
	  READ_WRITE : in    STD_LOGIC);

end bidir_infer;

architecture XILINX of bidir_infer is

    signal LATCH_OUT : STD_LOGIC_VECTOR(1 downto 0);

    begin
		
    process(READ_WRITE, DATA)
    begin

        if (READ_WRITE = '1') then
            LATCH_OUT <= DATA;
        end if;

    end process;

    process(READ_WRITE, LATCH_OUT)
        begin

        if (READ_WRITE = '0') then
            DATA(0) <= LATCH_OUT(0) and LATCH_OUT(1);
            DATA(1) <= LATCH_OUT(0) or LATCH_OUT(1);
        else
             DATA(0) <= 'Z';
             DATA(1) <= 'Z';
        end if;

    end process;

end XILINX;

