FOR IMMEDIATE RELEASE
XILINX ANNOUNCES INDUSTRY'S FIRST MEMORY CONTROLLER SOLUTION FOR
QUAD DATA RATE SRAMS
SAN JOSE, Calif., February 22, 2000—Xilinx Inc., (NASDAQ:XLNX) today announced the availability of a high-performance reference design for Quad Data Rate (QDR™) SRAMs based on low-cost Spartan™-II FPGAs. Cypress Semiconductor Corp. (NYSE:CY), IDT (NASDAQ:IDTI) and Micron Technology Inc. (NYSE:MU) defined and developed the new QDR SRAM architecture for future high-performance communications applications. The Xilinx Spartan-II FPGAs can be used to implement the control logic for the memory interface for the SRAM market. The new QDR architecture targets next-generation high-performance switches and routers. Xilinx Spartan-II FPGAs sustain data throughput of up to 7.2 Gigabits per second (Gbps), operating at clock rates of 100 MHz. Spartan-II FPGAs support delay locked loops (DLLs), high speed transceiver logic (HSTL) I/Os, and BlockRAM, which are essential in interfacing with QDR SRAMs. The memory controller circuit described in the Xilinx reference design can connect four QDR SRAMs to a host CPU. Each QDR SRAM has separate control signals for the read and write ports, while the address and data ports are common for all the SRAMs. The controller supports concurrent double data rate (DDR) operations on all of the input and output signals and allows byte-write operations into the memory. Operating in the single-clock mode the controller significantly simplifies the memory interface. "Xilinx is the first semiconductor company to deliver a QDR SRAM memory controller solution. We are very pleased to be working with the QDR SRAM consortium in creating next-generation high performance solutions," said Kapil Shankar, senior marketing director for the High-volume Business Unit at Xilinx. "This Spartan-II reference design further extends our leadership role in providing cost-effective solutions for a wide range of applications." "The QDR SRAM consortium is pleased to work closely with Xilinx in providing a Spartan-II FPGA based high-performance, cost-effective memory controller solution," said Matthew Arcoleo, strategic marketing manager for the Memory Products Division at Cypress Semiconductor. "The availability of a free memory controller reference design will proliferate the use of QDR SRAM based networking solutions." The development of the unique QDR SRAM architecture included extensive input from networking industry leaders (www.qdrsram.com). The devices are designed to greatly increase memory bandwidth compared with existing SRAM solutions and will serve as the main memory for look-up tables, linked lists, and controller buffer memory. This family of high-performance QDR SRAMs has been defined to provide customers with multiple supply sources. The consortium worked closely to ensure that customers will have second sources for the new QDR SRAMs by developing pin and function compatible products. Each partner is providing system expertise and product direction, giving customers the benefit of a wide range of market experience and innovative technology. Spartan-II FPGAs
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