FOR IMMEDIATE RELEASE
 

XILINX INTRODUCES FULLY PROGRAMMABLE ALTERNATIVE  TO SYSTEM-LEVEL ASIC DESIGN Leading process technology, architectural innovation, intellectual property cores, and ASIC design methodology combine in new Xilinx Virtex series   SAN JOSE, Calif., November 24, 1997 -- Xilinx, Inc., (NASDAQ:XLNX), the world leader in programmable logic solutions, today announced architectural details of a new series of high-performance, high-density, system-level design FPGA devices. Named the Virtex series, these devices will target the rapidly growing demand in today’s systems for devices that are capable of integrating varied, high-speed functions. The wireless communication, telecommunication, and computer market segments are being driven to provide smaller, lower power and more reliable products with more features fueling the need for system-level devices such as Virtex devices. Quarter-micron, 5LM process technology delivers greater than 100 MHz, million gate FPGAs "We have executed brilliantly on our previously released five-year roadmap with the delivery of the first quarter-micron FPGA devices last month," said Wim Roelandts, Xilinx president and CEO. "This process leadership is the foundation for architectural innovation demonstrated in our Virtex series, allowing Xilinx to continue to penetrate exciting new markets that were previously captive to inflexible ASIC technology." The Virtex series was optimized for this 0.25 micron, five layer metal technology to deliver better performance, more cost-effectiveness, and more predictable routing.  Innovations in FPGA design methodology available now The Virtex series combined with Xilinx software represents a new emerging platform in system-level design achieved through close strategic partnerships with leading EDA partners. Working with EDA partners has secured the immediate delivery of Xilinx Alliance series libraries to start Virtex designs now. Xilinx and its partners have co-developed a high-density solution for ASIC designers resulting in higher performance, faster compile times, and innovations that push state-of-the-art methodologies for FPGA design.  Architectural Innovations Address Challenges of Today and the Future  SelectI/O eliminates challenges of multiple standards Due to rapid process advancements, a flux in emerging standards has developed, complicating system-level design. The Virtex devices offer the Xilinx SelectI/O interface to multiple voltage and drive standards. Virtex architecture, with 2.5V supply voltage, offers the industry’s first devices capable of direct interface beyond CMOS and TTL logic. Virtex series will also support important low-voltage standards such as LVTTL, LVCMOS, GTL+ and SSTL3. The versatile SelectI/O interface allows a single device to interface to multiple standards simultaneously, eliminating the challenges of multiple signal standards in system design. Integral use of intellectual property cores Recognizing that designing million-gate densities gate-by-gate is impractical, Xilinx made the Virtex architecture adaptable to design and use cores. Optimizing the segmented interconnect, a fundamentally faster architecture than non-segmented interconnect, reduces the need for architecture specific cores. Users can more easily implement cores with highly predictable performance in high-level languages. For PCI applications, designers will realize 66 MHz performance. Hierarchy of RAM integration System-level designs today often have diverse requirements for RAM. The Virtex series is specially designed to interface to any amount of RAM through the Xilinx SelectRAM+ features: distributed SelectRAM, block SelectRAM, and high-speed access to external memory. Xilinx again pioneers on-chip RAM implementation as the first combination of these three RAM features. A common example of system-level designs requiring fast access to varied sizes of RAM is a video processing application: video frame data is stored in megabytes of RAM; line data is stored in kilobytes of RAM; and pixel and coefficient data is stored in bytes of RAM. The Virtex series offers an ideal hierarchy of SelectRAM+ features for such applications. For megabytes of storage, the Virtex SelectI/O feature provides 133 MHz external synchronous DRAM access compatible with the SSTL3 I/O standard. Kilobytes of data can be stored in block SelectRAM memory. Virtex series offers up to 32 blocks of 133 MHz dual port synchronous SRAM yielding internal memory bandwidth up to 17 gigabytes/second. For bytes of data, Virtex offers distributed SelectRAM memory. Pioneered in the Xilinx XC4000 family of FPGAs, the distributed SelectRAM provides fast and flexible access to shallow single and dual port synchronous SRAM. Vector-based interconnect produces fast and predictable routing The Virtex series uses a segmented routing optimized for interconnect delays as a function of the distance, or vector, from source to destination. This offers a faster, more predictable routing scheme than non-segmented interconnect. Virtex devices contain interconnects of varied lengths, resulting in delays that are fast, predictable, and insensitive to minor changes in placement. These advantages of segmented interconnect become increasingly important in high-density design. Synthesis tools will accurately model interconnect delays in Virtex series without placement information. Availability The first Virtex devices contain 250,000 system gates and 316 user I/O lines and are expected to be sampling in the second quarter of 1998. Virtex devices offering up to one million system gates are expected in the second half of 1998. Founded in 1984, Xilinx is the world’s largest supplier of programmable logic solutions producing industry-leading device architectures and world class design software. Headquartered in San Jose, Calif., the company pioneered the market for field programmable gate array (FPGA)semiconductor devices that provide high integration and quick time-to market for electronic equipment manufacturers in the computer, peripheral, telecommunications, networking, industrial control, instrumentation, consumer, and high reliability/military markets. For more information on Xilinx, access the World Wide Web site at www.xilinx.com. —30—  Xilinx is a registered trademark of Xilinx, Inc. All XC-prefix products, SelectI/O, SelectRAM, SelectRAM+, and Virtex referenced above are trademarks of Xilinx, Inc. Other brand or product names are trademarks or registered trademarks of their respective owners. #9742