Basic Virtex Architecture v2.1i  

Software & Version:
N/A

Audience:
New Virtex users. Some FPGA experience preferred. 

Prerequisites:
None

What is the level of the material?
Level I - Beginning

Training Duration:
1 hour

Content Description:
This module introduces the various features of the Virtex family of FPGAs, with emphasis on those features that are unique to Virtex. 

Objectives:
After completing this training, student will be able to:

  • List the architectural features of Virtex devices
  • Eliminate clock delays by using DLLs
  • List two applications where you would use the SRL16
     

Topics or Training Outline:

Introduction
CLB structure
Combinatorial logic resources
Register resources
Memory resources
I/O resources
Global resources

References:
Programmable Logic Data Book, App notes on Virtex features.