ABEL
-
Advanced Boolean Expression Language. Data I/O provides the ABEL compiler
for Foundation.
-
An EDA vendor. Aldec provides the Foundation Project Manager
,Schematic
Editor, Logic Simulator,
HDL Editor,
and State Editor
.
EDIF
-
Electronic Design Interchange Format. An industry standard netlist
format.
FPGA Express
-
Synopsys VHDL and Verilog compiler included with Foundation F2.1i.
HDL
-
Hardware Description Language.
HDL Editor
-
Foundation's editor for ABEL and VHDL. The HDL Editor
also provides a syntax checker, language templates, and access to the XABEL
and synthesis tools.
IEEE (pronounced "I triple-E")
-
Institute of Electrical and Electronics Engineers.
Logiblox
-
Blocks of Logic Optimized for Xilinx for M1. A GUI-based tool where generic
bus-width-independent symbols such as counters, adders, and data registers
are used to implement architecture-optimized functions.
Logic Simulator
-
Foundation's gate-level simulator, provided by Aldec.
-
PDF file
-
Project Description File. The PDF file contains library and other project-specific
information. Not to be confused with an Adobe Acrobat document with the
same extension.
Project Manager
-
Foundation's main environment, provided by Aldec.
The Project Manager guides the user through the design flow and manages
source files.
Schematic Editor
-
Foundation's schematic editor, provided by Aldec.
State Editor
-
Foundation's finite state machine editor, provided by Aldec.
VHDL
-
VHSIC Hardware Description Language. An industry standard
(IEEE 1076.1) HDL. Recognizable
as a file with a .VHD extension.
VHSIC
-
Very High Speed Integrated Circuit.
XNF
-
Xilinx Netlist Format.
-
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ABEL