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Xilinx XUP Workshop Schedule & Registration 


Workshop Summary
Schedule
Course Contents

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Past Workshops
 
 

 


Workshop Summary 

DON'T MISS THIS OPPORTUNITY !! 

If you have thought about teaching an engineering course which utilizes Programmable Logic technology, then attending one of Xilinx's University Workshops is the best way to get started.  The purpose of Xilinx's University Workshops is to teach academic instructors about Programmable Logic technologies from Xilinx, to show how to teach a course using the latest programmable logic technology, and to provide instructors with the resources and advice to develop their own 1st through 5th year curriculum. Programmable Logic technologies covered include FPGAs (Field Programmable Gate Arrays), and CPLDs (Complex Programmable Logic Devices). 

All workshop materials are in English.  Workshop presentation and instruction may be offered in local language when appropriate and qualified instructor is available.  Please see workshop schedule for more details. 

These workshops involve on-site presentation combined with hands-on lab exercises on the PC. Workshops are taught mainly by Xilinx professionals.  In some workshops, some instruction is also given by local professors who have experience with Xilinx products in their own course work in areas such as introductory and upper level digital logic design, processor architecture, digital signal processing, VLSI design, data communications, reconfigurable logic, and various advanced level projects. 

The great news is that these WORKSHOPS ARE FREE!! Since seats are limited at each event and demand is typically quite high, we recommend that you sign up as soon as possible. 
 


2000 Workshop Schedule

The XUP workshop is a comprehensive training covering Xilinx component architectures and associated Xilinx development software.  A portion of each day will include hands-on lab exercises using Xilinx Foundation Express 2.1i tools. 

ASU Workshop - Presented in English -  REGISTRATION CLOSED
Arizona State University 
January 12-13                        Tempe, AZ - USA 
This workshop will be primarily schematic based with some VHDL and Verilog examples.
 

2000 preliminary locations: 
Canada 
SouthWest USA 
Central USA 
Northern Europe 

Exact locations and dates will be announced once finalized. 
 


Course Contents 

XUP Workshop course modules may vary slightly, but each standard Xilinx workshop stresses hands-on learning and covers these subjects: 
  • Introduction to PLD/FPGA technologies, architectures and programming methods
  • XC4000 FPGA family architecture training
  • XC9500 CPLD family architecture training
  • FPGA Express for VHDL and Verilog HDL synthesis 
  • Hands on Labs using Foundation Express 2.1i software!
  • Exciting applications and project suggestions 
  • Roadmap of upcoming Xilinx products and industry trends
  • Prentice Hall's Xilinx Student Edition lab tutorial 
  • Professor guided outline of actual class and lab (depending on workshop)
  • Participation in Xilinx's University Program

Past Workshops 

Xilinx would like to acknowledge the following universities which have hosted excellent XUP workshops since June, 1995: