|
|
|
Virtex Enables Qualcomm to Get to Market as Fast as Possible in Order to Stay Ahead of the Competition
Qualcomm According to Jim Crysdale, Senior Staff Engineer & Manager at Qualcomm, "The project that I am working on is called a high data rate project, and that high data rate project or HDR, is Qualcomm’s newest technology. The company is focusing on this technology because it is going to deliver high-speed wireless data communications. So the idea is that we are going to enable the internet in wireless communications. In fact we are working with Cisco and the router is part of our system to develop this very high-speed data network that will allow you to do basically wireless communications. Basically, it will be within the same framework as narrow band CDMA. You’ve heard of 3G and those kinds of things, what we are trying to do is a little forward advanced version of this and what we’re doing is allowing speeds to go up to 2.4 Mbits per second so it’s a very, very high-speed, high-capability product. We already have development demo systems out there with Xilinx parts on them. By the end of the year (by the fourth quarter) we will have a very large-scale demo that we will display and hopefully we will get a quite a bit of publicity for it, so it should be very exciting. It’s a very exciting project - it will change the world. The parts that we are using currently are the XCV800s and XCV1000s. We are using the –4 and –5s, which are their lower speed grades and we are actually getting the performance that we need in those speed grades. It’s very important to us obviously because part cost is critical. One of the reasons that we choose Xilinx and the Virtex parts in particular is because I personally have a long history with the XC4000. They have always been successful and, with the XC4000 Series, Xilinx has delivered what they said they would, so I have personal confidence in them. The Virtex parts were also the most advanced that we could find. The block memory was very important because we need a lot of storage to store data. Obviously when you’re running data networks you have to store data, and the fact that we had on-chip RAM was very enabling to us. Some of the other reasons are that our demo systems that we have in place which customers are demoing right now (the high speed trials that we are doing) are using 4085s. Modulators, demodulators, a lot of the stuff are already in Xilinx so a lot of our engineers are already familiar with how to use Xilinx. The Virtex is a step beyond, but a lot of the same ideas of loading the parts, how they work, how they run, we already understood. That’s a large part of development, you really care about engineering time and that’s one of the things that Xilinx is providing for us. It also allows flexibility. We’re really developing this system - it’s brand new, it’s wireless data, and data is different than voice data that you currently have in your handsets. Therefore, there could be changes as we get these through larger systems trials we many find that we have problems. If we do, the fact that we’re in an FPGA and not locked down to an ASIC is also a very big plus for us. It is certainly worth the extra price that we would pay. The other thing is that I don’t have to allocate engineers to ASIC downstream issues, we can just work on the actual system which is very important. Plus, some of the things in the basestation’s NRE costs are not justified yet until we sell a million of these things, so yes we are certainly going to save ourselves money because we’re going to spend a lot on NRE. So the flexibility, the NRE costs, there are a lot things that go into that. The tools that Qualcomm uses are all VHDL-based, we use Synopsys Design Compiler, so pretty much vanilla tools and we’re really finding some good success with the M2.1 release tools by Xilinx, so that’s also been very good for us. In fact the performance that we’re getting is pretty outstanding right now. With an XCV800 part we’ve been able to get “580,000 equivalent design gates” running at 43 Mhz and in that design, I’ve got demodulator functions, modulator functions, digital filters and turbo encoders in there. We got all that in one Virtex part, so it’s pretty exciting. We can get quite a bit of good performance out of that. We’ve also got a turbo decoder which is a very large, very big data engine that we are fitting into a Virtex part also. So there’s a lot of stuff and very plus for us is we’re able to develop this system very, very quickly. We feel way ahead of the competition, we feel like we’ve got a big market here and we’re trying to get there as fast as possible and Virtex has really been enabling us to do that. So I really put my eggs in the Xilinx basket, so hopefully things will keep working. We just got the first rev of the M2.1 series loaded and we’re running and XCV800 in one of our parts, the demodulator/modulator part. We actually got under 2 hours on a single SPARC station for compile time and that was 94% full, so that was when I was saying its about 580,000 equalivant design gates, that’s much faster than what we were seeing with the M1 tools which were quite a bit longer. It kind of makes sense because if you look back historically, the 4085 series with the M1 tools, I would see compile times for the full 4085 which is probably about 80,000 design gates equivalently, and that was probably around two to three hours. Qualcomm has pretty much been an ASIC house, we’ve sold millions of ASICs so our Qualcomm flow is really targeted towards our own internal custom ASIC vendor. We’ve been able to pretty well seamless use Virtex in that same environment which has been a very big plus because that was always an issue. We are using Synopsys which is really targeted towards ASIC and not FPGA designs. But because the M1 tools have come so far, we’re actually able to get really spectacular results, as I was saying, 43 MHz is as good as I was hoping we would get. But the really nice thing about FPGAs, the reason I was pushing FPGAs, is the bottom line - I’ve done a lot of FPGAs in the past too and yet once you’re done with your design it takes a lot of engineering man hours just to get an ASIC out the door. Which means there’s a lot of working with backend tools with the vendor, there are a lot of testability issues that you have to go through. You really have to prove out that piece of silicon because it’s a big effort to manufacture a one time programmable part. So one of the big plusses is the synthesis flow, once we get that FPGA, we put it in the lab and we’re done. So, as far as flexibility of using an FPGA, I used to be a dyed-in-the-wool ASIC guy and now I’m a dyed-in-the-wool FPGA guy because it’s much nicer to keep your hair and not have the pressure. I’m really putting my reputation on the line in my company to get the Xilinx parts because I really believe that they are a good fit for not only base stations but for the handsets, just because of the maturity of what we’re doing. So really we’re counting on the fact that Xilinx could deliver these Virtex parts. Initially, I had some sleepless nights but at this point things really look good. In fact, I’m at the point where my leadtimes are so short I don’t even have to worry about leadtimes anymore. In fact I’m more worried about us losing the parts once they get here than Xilinx, and that’s a true statement. So it looks like the yields have been great, it looks like, in fact, that everything really looks good with the Virtex parts. If Virtex-E does as well, we’ll be happy to take advantage of that also. The leadtimes we’re being quoted is a couple of weeks so I cannot complain, I can’t get a resistor that quick, so things look pretty good." for more information on Qualcomm, you can visit their web site at http://www.qualcomm.com |
||||
| More
Information
|
