Answers Database
FPGA Configuration: Preparing a bitstream for peripheral mode configuration.
Record #117
Problem Title:
FPGA Configuration: Preparing a bitstream for peripheral mode configuration.
Problem Description:
Urgency: Standard
General Description:
Methods for perparing a bitstream for peripheral configuration
based on version of Xilinx Tools and flow.
Solution 1:
Solution 3: Xilinx M1 (Windows or UNIX based):
1. Use PROM File Formatter to generate an MCS file from your
.bit file.
2. Use the MAKESRC utility (from
http://www.xilinx.com/support/troubleshoot/htm_index/utils_prom.htm )
to create a C or Assembly code formatted hex file.
The loader program should load the MSB of each byte of data
to D7 for peripheral asynchronous (parallel loading) mode, or
send LSB first if in serial slave mode.
Solution 2:
Solution 1. XACTStep (6.0.1) or M1.x implementations:
1. Use makeprom to generate an MCS format prom file from your
.bit file.
2. Use the MAKESRC utility (from
http://www.xilinx.com/support/troubleshoot/htm_index/utils_prom.htm )
to create a C or Assembly code formatted hex file.
The loader program should load the MSB of each byte of data to
D7 for peripheral asynchronous (parallel loading) mode, or
send LSB first if in serial slave mode.
Solution 3:
Solution 2: XACTStep (5.2.1) DOS or UNIX based or earlier:
1. Use makeprom to generate an MCS file from your .bit file.
2. Use the MAKESRC utility (from
http://www.xilinx.com/support/troubleshoot/htm_index/utils_prom.htm )
to create a C or Assembly code formatted hex file.
The loader program should load the MSB of each byte of data to D7 for peripheral asynchronous
(parallel loading) mode, or send LSB first if in serial slave mode.
End of Record #117 - Last Modified: 09/29/99 10:02 |
