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FPGA Configuration:init goes low, addresses keep incrementing (master parallel)
Record #124
Problem Title:
FPGA Configuration:init goes low, addresses keep incrementing (master parallel)
Problem Description:
Urgency: Standard
General Description:
An XC4000 family device configuring in master parallel mode may
appear to never finish configuration because the address lines
continue changing for long periods of time without the part
ever configuring.
Solution 1:
In reality what is probably happening is that the INIT signal
has gone low, indicating that a configuration error has
occurred. This means the checksum at the end of a data frame
did not correlate with the data recieved. When this happens,
the configuration of the device is halted, but the address
lines will continue to toggle!
Causes for the INIT signal to go low: noise, swapped
address/data bits and the most common of all: the design has
been compiled for the wrong parttype (and therefore the frames
are different sizes).
End of Record #124 - Last Modified: 11/12/98 10:14 |
