Answers Database
JTAG - Avoiding inadvertent activation of boundary scan in Xilinx devices with Pull-up resistors
Record #239
Product Family: Hardware
Product Line: 4000E
Product Part: 4000E
Problem Title:
JTAG - Avoiding inadvertent activation of boundary scan in Xilinx devices with Pull-up
resistors
Problem Description:
Urgency: Standard
General Description:
How to prevent inadvertent activation of boundary scan?
Solution 1:
By default, when an FPGA powers up, week pull-ups are activated
on TDI, TMS, and TCK. Even though these pull-up resistors are
present, external pull-ups (especially on XC4000,5000, and Spartan devices)
are recommended on TDI, TMS, and TCK. This will minimize the possibility
of inadvertently entering Boundary Scan mode.
End of Record #239 - Last Modified: 01/07/00 16:42 |
