Answers Database
FPGA Configuration: Minimum pulse width for PROG to reconfigure an FPGA.
Record #492
Product Family: Hardware
Product Line: 4000E
Product Part: 4000E
Problem Title:
FPGA Configuration: Minimum pulse width for PROG to reconfigure an FPGA.
Problem Description:
Urgency: Standard
General Description:
What is the required pulse width for PROG to clear the configuration memory of an FPGA?
Solution 1:
The PROGRAM pin must be held low for greater than 300ns to be
recognized. This spec can be found in the Xilinx Programmable Logic Data Book. This data is shown
in the timing diagram as "Re-program".
End of Record #492 - Last Modified: 11/10/98 15:02 | 
