Answers Database Designing with the XC5200 family using synthesis Record #1017 Product Family: Hardware Product Line: 5200 Product Part: 5200 Problem Title: Designing with the XC5200 family using synthesis Problem Description: Here are some things to look for when designing with the XC5200 family using synthesis : Solution 1: * Arithmetic logic : This uses twice as many columns as the XC4000. If                 you have a counter/incrementer that is loadable,                 you can get it done with one less column if you                 use XBLOXGEN and instantiate the resulting XNF file. * Clock enables : Each CLB shares a dedicated clock enable. The more clock enables you have, the harder it is for the placer to put things in the same CLB. This spreads the logic out, causing more nets and routing delays. * Asynch resets : Same story as above. * Horizontal LL : The more TBUFs you use, the more you restrict the                 router. It's harder for the router to get across the                 chip. End of Record #1017 - Last Modified: 05/20/96 15:27

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