Answers Database


CPLD: XC9500: Does Vccint have to be powered up before Vccio?


Record #1478

Product Family: Hardware

Product Line: 9500

Product Part: 9500

Problem Title:
CPLD: XC9500: Does Vccint have to be powered up before Vccio?


Problem Description:

Urgency:    Standard

General Description:

In the 9500 section of the Xilinx data book, the following statement is made:

In a mixed 3.3V/5V systems, it is a recommended that
Vccint >= Vccio at all times during the power-up sequence.

Given this recommendation, what would happen if Vccio powered up
before Vccint?


Solution 1:

While we say Vccint > Vccio, the actual relationship which is
required is Vccint > Voltage Seen on Pins.

So, if Vccio > Vccint, nothing will happen as long as Vccint
is greater than the voltage seen on the pins. However, in any
practical system, Vccio tends to equal the voltage levels being
driven into the device pins. Since you don't want the voltage
on the pins exceeding Vccint, Xilinx recommends Vccint > Vccio
even though the real relationship that must be followed is
Vccint > voltage seen on pins. Sustaining a higher voltage on
Vccio than Vccint for long periods of time could result in
internal damage to the part.

So why does Xilinx recommend Vccint > Vccio at all times during power-up?

The input protection circuit of the I/O is tied to Vccint. So
you want to be sure that Vccint is powered up before applying
voltage to any device inputs for any length of time, otherwise
you foward bias the input protection diode. If you want to
remove Vccio after the device is powered-up, you will not
damage the device because the input protection diode is tied to
Vccint.




End of Record #1478 - Last Modified: 07/30/99 19:13

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!