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FPGA Configuration: What Threshold does CCLK use for 5 Volt FPGAs?Record #1519
Problem Title: Xilinx FPGAs use CMOS transistors, but mimic a BJT like structure in that outputs drop a threshold on the VOH. Therefore, when CCLK is used as an output it swings from 0 to 4.0 volts. As an input the CCLK triggers at a threshold of 1.5 Volts. This is compatible with both TTL and CMOS threshold standards:Thres. TTL CMOS ----------------------- VILmax 0.8 1.0 VIHmin 2.0 70%(Vcc) VOLmax 0.4 0.4 VOHmin 2.4 Vcc - 0.5V Therefore, CCLK may be used to source or load either TTL or CMOS type external circuitry. End of Record #1519 - Last Modified: 01/08/99 15:22 |
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