| Answers Database
 
 CPLD: XC9500/XL: How are unused I/O pins handled?   Record #1536
 
Product Family:  Hardware
 Product Line:  9500
 
 Product Part:  9500
 
 Problem Title:
 CPLD: XC9500/XL: How are unused I/O pins handled?
 
 
 Problem Description:
 Urgency: standard
 
 General Description: How do you handle unused pins of a XC9500 device?
 
 
 Solution 1:
 
 Xilinx recommends tying any unused pins to either the board ground or to a
 board trace. This will help reduce problems associated with ground bounce and
 noise.
 
 Unused I/O pins in the XC9500/XL devices are tristated with a weak pullup.
 
 However, with the M1.x/2.1i software. there is a "Create Programmable
 Ground Pins" option. If this option is selected in addition to tying the unused
pins to ground, it will be more beneficial as far as noise and ground bounce
 issues are concerned.
 
 
 
 
 
 End of Record #1536 - Last Modified: 12/20/99 13:03
 |