Answers Database NC-VERILOG: How to compile the 2.1 Verilog Simprims, LogiBLOX, Unisims, and Coregen libraries? Record #2554 Product Family: Software Product Line: Cadence Product Part: verilog Problem Title: NC-VERILOG: How to compile the 2.1 Verilog Simprims, LogiBLOX, Unisims, and Coregen libraries? Problem Description: Urgency: Standard General Description: To perform timing or post-synthesis functional Verilog simulation with the Xilinx Alliance 2.1i tools, the Verilog-based Simprim models must be compiled for use in the NC-Verilog simulator. If instantiated LogiBLOX, CORE Generator and/or Unified library components are to be behaviorally simulated, the LogiBLOX, CORE Generator and/or Unisim libraries must be compiled as well. The Xilinx Alliance software contains 2 types of Verilog simulation libraries and Coregen contains one: simprim - Library of generic simulation primitives unisim - Library of Unified component simulation models XilinxCoreLib - Coregen HDL Library. Please see (Xilinx Solution 7859) for instructions on extracting this library. Please see (Xilinx Solution 4873) on how to compile Xilinx Alliance 1.5 Verilog libraries. Solution 1: If you are using the UNIX OS, there are scripts availible on the Xilinx FTP site that will compile the Cadence's Affirma NC-Verilog libraries. Verilog: ftp://ftp.xilinx.com/pub/swhelp/cadence/ncv_ver_compile_21.tar.Z Solution 2: Step 1> Create a library definitions file named cds.lib. The cds.lib file defines which libraries are accessible and where they are located. The file contains statements that map logical library names to their physical directory paths. Cadence provides an utility, called 'nclaunch' to setup the necessary initialization files, and to compile the Verilog source libraries. Nclaunch is available as part of the 2.1 and later releases. Otherwise, this is a manual process. The cds.lib can be created with any texteditor. The physical locations to the logical names must also be created before preceding to the next step. Use the UNIX command mkdir. For example, mkdir -p <compile_dir>/simprims_ver If you want the logical library names to be available for all designs, use INCLUDE or SOFTINCLUDE to the location of your master cds.lib file. EX: INCLUDE $CDS_INST_DIR/share/local/xilinx/cds.lib Edit $CDS_INST_DIR/share/local/xilinx/cds.lib to include DEFINE simprims_ver <compile_dir>/simprims_ver DEFINE uni3000 <compile_dir>/uni3000 DEFINE unisims_ver <compile_dir>/unisims_ver DEFINE uni5200 <compile_dir>/uni5200 DEFINE uni9000 <compile_dir>/uni9000 DEFINE xilinxcorelib_ver <compile_dir>/xilinxcorelib_ver Step 2> Create a configuration variables file called hdl.var. The hdl.var file defines variables that determine how the user environment is configured. The variable (LIB_MAP, VIEW_MAP, WORK) are used to specify the search order of the libraries and views when the elaborator resolves instances. If you want the variable settings to be available for all designs, use INCLUDE or SOFTINCLUDE to the location of your master hdl.var file. EX: INCLUDE $CDS_INST_DIR/share/local/xilinx/hdl.var Edit $CDS_INST_DIR/share/local/xilinx/hdl.var SOFTINCLUDE $CDS_INST_DIR/tools/inca/files/hdl.var DEFINE LIB_MAP ( $LIB_MAP, \ <compile_dir>/simprims_ver => simprims_ver, \ <compile_dir>/uni3000 => uni3000, \ <compile_dir>/unisims_ver => unisims_ver, \ <compile_dir>/uni5200 => uni5200, \ <compile_dir>/uni9000 => uni9000, \       <compile_dir>/xilinxcorelib_ver => xilinxcorelib_ver) DEFINE VIEW_MAP ( $VIEW_MAP, .v => v) Depending on the family that you're simulating, you must edit the hdl.var file to correctly list the search order of the simulation libraries. Step 3> Parse and analyze the Xilinx simulation libraries using ncvlog. SIMPRIMS: ncvlog -messages -work simprims_ver $XILINX/verilog/src/simprims/*.v UNISIMS: ncvlog -messages -work uni3000 $XILINX/verilog/src/uni3000/*.v ncvlog -messages -work unisims_ver $XILINX/verilog/src/unisims/*.v ncvlog -messages -work uni5200 $XILINX/verilog/src/uni5200/*.v ncvlog -messages -work uni9000 $XILINX/verilog/src/uni9000/*.v COREGEN: Please see (Xilinx Solution 7859) for instructions on extracting this library. ncvlog -messages -work xilinxcorelib_ver ./XilinxCoreLib End of Record #2554 - Last Modified: 11/12/99 17:07

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