Answers Database
CONCEPT-HDL 13.5: Sir2edif coredumps on RAMB* components
Record #2650
Product Family: Software
Product Line: Cadence
Product Part: concept
Product Version: 1.7
Problem Title:
CONCEPT-HDL 13.5: Sir2edif coredumps on RAMB* components
Problem Description:
Urgency: High
General Description:
Sir2edif coredumps on RAMB* components
Solution 1:
SIR2EDF crashes on the Virtex library RAMB* component because of a 256-bit
parameter statement. The following patch will correct the core dump, hower, the
parameter will not get into EDIF file and will need to be passed through UCF file.
ftp://ftp.cadence.com/patches/PE135/PIC/sun4v/chdlPICXil05.20-s001sun4v.t.Z
ftp://ftp.cadence.com/patches/PE135/PIC/sun4v/chdlPICCom05.20-s001sun4v.t.Z
The patch also fixes the following issues:
1. xil2cds fails for POWER PINS other than VCC or GND (virtex)
2. xil2cds needs to support SPB (special pin bidirectional) pin
3. net properties on named net not being passed to EDIF netlist
End of Record #2650 - Last Modified: 11/03/99 16:55 |