Answers Database
FPGA Configuration: ALL I/O (including DONE) Tristate during configuration.
Record #2748
Product Family: Hardware
Product Line: 4000E
Product Part: 4000E
Problem Title:
FPGA Configuration: ALL I/O (including DONE) Tristate during configuration.
Problem Description:
Urgency: Standard
General Description:
During configuration all I/O including the DONE pin are
3-stated with a weak pullup.
Solution 1:
Under certain circumstance it is possible for ALL I/O to go
into tristate with a weak pullup. This would happen during programming
(configuring the device), or during reprogramming of the
device.
There is actually an 8th reserved and undocumented mode of
configuration. This is a special Test Mode that is entered by
holding M0 high, M1 and M2 low and then bringing the Program
pin low. When this occurs the device will go into the test mode
and All I/O will be in a tristate (with a pullup) condition. The device will
stay in the test mode until the mode pins change.
Also it is possible that if the mode pins are floating that the
device may stay in the Test Mode until power down. This is why
it is a good reason to either pullup or pulldown the mode pins
to the proper level for the desired configuration mode.
End of Record #2748 - Last Modified: 10/11/99 18:37 |
