Answers Database
CPLD: XC9500/XL: Why do the XC9500/XL libraries have pull-up elements?
Record #3000
Product Family: Hardware
Product Line: 9500
Product Part: 9500
Problem Title:
CPLD: XC9500/XL: Why do the XC9500/XL libraries have pull-up elements?
Problem Description:
Urgency: standard
General Description:
Although the XC9500/XL family devices have pullups, they are not user
controllable. Why are they still included as library elements?
Solution 1:
If an internal 3-state mux is drawn in a schematic (using 2 or more
BUFE/BUFT buffers), direct functional simulation of the schematic
will fail to produce a 1 state if all buffers are disabled (actual
chip behavior) unless a pullup symbol is connected.
Solution 2:
Users can retarget an FPGA design containing pullup symbols to
9k without having to remove the pullups; the resulting
implementation will still be accurate.
End of Record #3000 - Last Modified: 12/13/99 12:57 |
