Answers Database


CPLD XC9500/XL : How are initial states of flip-flops determined on the 9500 CPLD's?


Record #3123

Problem Title:
CPLD XC9500/XL : How are initial states of flip-flops determined on the 9500 CPLD's?


Problem Description:
Urgency: Standard

General Description:
The user may want to have the powerup state of a flip flop to be a
logic high - `1`. What type of flip flop would have to be used in
order to achieve that? Is there a property that can be attached to
a flop to have it powerup into a `1` state?


Solution 1:

All flip flops will be initialized with a '0', but adding the attribute
INIT=S will allow any flip flop with this attribute to power up
in the `1` state.

Example:
You have a flip flop instance named TEST
In your UCF you would place
INST TEST INIT=S;





End of Record #3123 - Last Modified: 02/03/00 11:56

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!