Answers Database
2.1i, V1.5, V1.4 COREGEN, FOUNDATION EXPRESS: How to generate Foundation functional simulation files for a VHDL design
Record #3863
Product Family: Software
Product Line: Coregen
Product Part: Coregen
Problem Title:
2.1i, V1.5, V1.4 COREGEN, FOUNDATION EXPRESS: How to generate Foundation functional
simulation files for a VHDL design
Problem Description:
Urgency: hot
General Description:
Simulating a VHDL design with the Foundation
simulator requires that a Foundation simulation netlist (.ALR)
file be generated for the design.
Solution 1:
Currently with the 1.5 and 1.4 versions of CORE Generator software,
if the user is using a top level VHDL file in Foundation and wishes to do
pre-NGDBUILD functional simulation, the only way
you can generate the required .ALR file for the COREGen
module is to include "Foundation Schematic Symbol" as one of
your Output Formats when you set the Output Options.
The reason for this is because the same Foundation executable
currently generates both the schematic symbol *and* the .ALR
functional simulation model for the core.
In the 2.1i release, simply select "VHDL" for your Design Flow setting,
and "Foundation" as your vendor to obtain the .ALR file for your core
if you are running CORE Generator in standalone mode.
Additional information on the Foundation VHDL flow can be found
in the online CORE Generator User Guide, which is accessible
from the Help menu.
End of Record #3863 - Last Modified: 09/07/99 09:28 |
