Answers Database
V1.5 COREGEN, FOUNDATION, XC4000, SPARTAN: "Warning 9199: Unknown component - B998, TBUF" when loading Foundation design containing COREGEN SINE-COSINE LUT, FIFOs, ROMs, or RAMs into the F1.5 Foundation simulator
Record #4521
Product Family: Software
Product Line: Coregen
Product Part: Coregen
Product Version: c1_5
Problem Title:
V1.5 COREGEN, FOUNDATION, XC4000, SPARTAN: "Warning 9199: Unknown component - B998, TBUF"
when loading Foundation design containing COREGEN SINE-COSINE LUT, FIFOs, ROMs, or RAMs into the
F1.5
Foundation simulator
Problem Description:
Urgency: hot
General Description:
When trying to run a functional simulation in Foundation
directly from a schematic containing one of the larger COREGEN
SINE-COSINE lookup tables (8 bit-input or wider) , FIFO, ROM
or RAM modules (64 words deep or more), the simulator issues
the following warning:
Loading - D:\FNDTN\ACTIVE\PROJECTS\SINCOS_T\sincos_t.alb
Loading library default timing values
Loading - MYSINCOS
Forcing zero-delay default timing values
Warning 9199: Unknown component - B1003, TBUF
Warning 9199: Unknown component - B1008, TBUF
Warning 9199: Unknown component - B1013, TBUF
The larger SINCOS LUTs, FIFOs, and memories use TBUFs for
muxing. Foundation is unable to understand the TBUF component
because it is not a valid Unified Library simulation primitive. The correct name for a Unified Libr
ary 3-state
buffer primitive is "BUFT".
Solution 1:
Download the following data file update from the Xilinx ftp
site:
ftp://ftp.xilinx.com/pub/swhelp/coregen/cg15t_nt.zip (PCs)
ftp://ftp.xilinx.com/pub/swhelp/coregen/cg15tbuf.tar.Z (Solaris & HP)
Installing this patch on Solaris and HP platforms is optional.
Extract this update to your main COREGEN directory.
After installation of this update, regenerate your core.
The COREGEN version will remain unchanged at V1.5.0.
The fix to this problem is also bundled into the Coregen v1.5.2
incremental update which is included with the F1.5i_sp1 and A1.5_sp1
Service Packs. Both Service Packs may be downloaded from:
http://support.xilinx.com/support/techsup/sw_updates/index.htm
Solution 2:
- Edit the .EDN file produced by COREGEN and replace all
instances of the string, "TBUF" with "BUFT".
- Next, open the Foundation schematic editor and select
Hierarchy->Create Macro Symbol from Netlist".
- On the pop-up that appears, click on the
"Xilinx [*.XN*, *.BAX]
field at the bottom of the pop-up and select
"Edif 200[*.ED*]
Select the EDN file corresponding to your COREGEN module.
From the "Options" menu back in the schematic editor,
select "Export Netlist".
Solution 3:
Overall strategy: Create a simulation netlist based on
SIMPRIM simulation primitives instead of Unified Library
simulation primitives by running a Checkpoint Simulation
based on the NGD file for the design.
The basic procedure is:
- Create a new Version and Revision of the design;
- Run the Translate step on the design using the Interactive
Flow Engine to obtain a design.NGD file.
- Run Checkpoint Simulation from the Foundation Project
Manager Tools menu, specifying the NGD file as the input.
Detailed instructions:
----------------------
- From Foundation Project Manager, with your project icon
selected, select Create Version from the "Project" menu and
click on OK to accept the new Version number.
- Again from Project Manager, create a new Revision: select
the new Version just created, and click on
"Project"->"Create Revision".
- With the new Revision selected, click the Right mouse
button and select "Invoke Interactive Flow Engine".
A Flow Engine GUI with the Design Flow diagram appears.
- Click on the second button from the left on the bottom
of the GUI (the one with a triangle/arrow pointing to a
vertical line on the right to run the Translate step only on
the design.
This generates the .NGD file for the design.
Now click on the Foundation Project Manager GUI and under the
"Tools" menu, click on "Simulation and Verification".
Select "Checkpoint Gate Simulation Control".
Select the NGD file you just generated as the input.
Foundation generates a new simulatable netlist based on
SIMPRIMs for you.
Proceed with your functional simulation as usual.
End of Record #4521 - Last Modified: 02/12/99 20:20 |
