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Virtex Configuration: Done goes High, but device does not startup
Record #5865
Problem Title:
Virtex Configuration: Done goes High, but device does not startup
Problem Description:
Urgency: Standard
General Description:
Virtex Device being configured at high speed. DONE goes High, but the device
does not startup - I/O's are still tri-stated.
Solution 1:
If the DONE pin rises slowly, attach an external resistor to DONE. The recommended value is 330ohm.
If DONE still does not rise within one CCLK cycle, then set the bitgen option DonePipe=Yes. With this
DonePipe set to Yes, the device adds a pipelined register stage to the DONE input (CFG_DONE) path.
For example:
CCLK is running at 33MHz in slave serial mode.
If the rise time of DONE is > 25 ns, then you should
delay the CFG_DONE signal using DonePipe=Yes.
Solution 2:
Alternatively, if DONE pin rises slowly, try setting the bitgen
option DriveDone=Yes to actively drive the DONE pin.
Note: You can only do this if you are configuring 1
device or the device is last in a daisy-chain.
Solution 3:
If you find that the rise time of the Done pin is within 1 cycle of
CCLK, but the device still does not start up, then try the following
bitgen options:
DONE_cycle = 3
GSR_cycle = Done
GWE_cycle = Done
GTS_cycle = Done
Solution 4:
Another reason why the device does not startup is becuase it did not recieve adequate CCLK cycles
to take it through the startup sequence. Two things can be done- either give the device more
CCLK's, or change the bitgen options to set the DONE going high last. Keep in mind the latter
could have negative effects on daisy-chain configurations.
Solution 5:
In Virtex configuration, the clock used when the device is in the startup sequence
can be chosen by the user. If the selection is something other than CCLK, the
device may not start up. Check the bitgen options in the bitgen.ut file to make
sure the startup clock is the expected value.
End of Record #5865 - Last Modified: 02/07/00 09:55 |
