Answers Database
1.5i Virtex Map/PAR - Clock net LOC constraints may be ignored if IPAD to BUFG connection is used.
Record #6492
Product Family: Software
Product Line: FPGA Implementation
Product Part: map
Product Version: 1.5i
Problem Title:
1.5i Virtex Map/PAR - Clock net LOC constraints may be ignored if IPAD to BUFG connection is
used.
Problem Description:
For the following configuration:
IPAD------------------BUFG--------
NET_X
The .ucf NET constraint:
NET "NET_X" LOC=Y11 ;
is not handled successfully by the Map and PAR tools in version 1.5i.
Map incorrectly maps to a standard IOB rather than GCLKIOB and writes a
LOC constraint into the .pcf file for the GCLKIOB site. PAR incorrectly ignores
this invalid LOC constraint, so that there is no feedback to the user that the original
.ucf constraint was ignored.
Solution 1:
This problem is fixed in version 2.1i.
Meanwhile, the following configurations will work with the net constraint:
IPAD----------IBUFG-----------BUFG
NET_X
IPAD----------BUFGP
NET_X
End of Record #6492 - Last Modified: 05/13/99 14:40 |
