Answers Database
2.1i Virtex PAR - FATAL_ERROR:Place:xvkapanal.c:1860:1.1.2.21.2.1
Record #6690
Product Family: Software
Product Line: FPGA Implementation
Product Part: par
Product Version: 2.1i
Problem Title:
2.1i Virtex PAR - FATAL_ERROR:Place:xvkapanal.c:1860:1.1.2.21.2.1
Problem Description:
Cases have been seen where PAR fails with the error:
FATAL_ERROR:Place:xvkapanal.c:1860:1.1.2.21.2.1 - Found signal
pq5/barenone/nx139 connected to multiple loads. Output from F5 pin can only
drive F5IN of the slice in the same CLB. Process will terminate. To resolve
this error, please consult the Answers Database at http://support.xilinx.com
This error is occurring because support for an F5 to X connection has been added
to the device representation so that the F5 pin can now reach general routing resources
in order to drive multiple loads. Map now makes use of this capability, but the placer (PAR)
will fail thinking that this is a DRC violation.
The configuration that leads to this error is a MUXF5 driving a MUXF6 and also
driving other logic.
This error will occur only in cases where a MUXF5 is driving a MUXF6.
The DRC check will be relaxed to allow multiple loads on the F5 pin.
Solution 1:
This problem is fixed in the latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/
Solution 2:
A tactical patch is now available for use with 2.1i (pre-service pack) only.
PC: ftp://ftp.xilinx.com/pub/swhelp/M2.1i_updates/21i_par_pc_6690.zip
Solaris: ftp://ftp.xilinx.com/pub/swhelp/M2.1i_updates/21i_par_sol_6690.tar.gz
CAUTION: This Tactical Update is intended as a fast response for this
customer issue only. The risk inherent in this fast response is that there
is not enough time or resources available for the full regression testing
that is done for the Service Pack Updates and there is a higher risk of
introducing new problems. It is recommended that customers always install
the latest Service Pack Update, but only install Tactical Updates when needed
to resolve specific issues. This Tactical Update may not be compatible with
other Tactical Updates made available by Xilinx.
NOTE: This Tactical Update is only compatible with a 2.1i (pre-service pack)
system. It corrects the following issue:
Virtex PAR fails with the error:
FATAL_ERROR:Place:xvkapanal.c:1860:1.1.2.21.2.1 - Found signal
xxx connected to multiple loads. Output from F5 pin can only
drive F5IN of the slice in the same CLB.
This error is occurring because support for an F5 to X connection
has been added to the device representation so that the F5 pin can
now reach general routing resources in order to drive multiple loads.
Map now makes use of this capability, but the placer (PAR) will fail
thinking that this is a DRC violation.
The configuration that leads to this error is a MUXF5 driving a
MUXF6 and also driving other logic.
To install Solaris update:
cd $XILINX
gzip -d 21i_par_sol_6690.tar.gz
tar xvf 21i_par_sol_6690.tar.
To install PC update, unzip the update file in the 2.1i install directory
while maintaining directory structure.
Solution 3:
A work around is to ensure that all MUXF5 symbols that drive MUXF6 symbols do
not also drive other logic.
End of Record #6690 - Last Modified: 10/18/99 10:19 |
