Answers Database
2.1i Virtex MAP - Map will not put two unconstrained SRL16s into a single Virtex slice.
Record #6793
Product Family: Software
Product Line: FPGA Implementation
Product Part: map
Product Version: 2.1i
Problem Title:
2.1i Virtex MAP - Map will not put two unconstrained SRL16s into a single Virtex slice.
Problem Description:
Urgency: Standard
Problem Description:
MAP in build C.16 of 2.1i will only pack one SRL16 per slice in Virtex
unless forced to by map constraints.
Solution 1:
This problem is fixed in the latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/
Solution 2:
This problem can be worked around by constraining the two SRL16s to the same slice.
End of Record #6793 - Last Modified: 01/25/00 16:10 | 
