Answers Database


2.1i Virtex PAR - Virtex designs with area constraints may run out of memory during placement.


Record #6953

Product Family: Software

Product Line: FPGA Implementation

Product Part: par

Product Version: 2.1i

Problem Title:

2.1i Virtex PAR - Virtex designs with area constraints may run out of memory during placement.



Problem Description:
A memory leak problem has been seen on some Virtex designs with area
constraints, which causes PAR to run out of memory during placement.


Solution 1:

This problem is fixed in the latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/




End of Record #6953 - Last Modified: 10/18/99 10:21

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!