Getting Started with Xilinx FPGAs v2.1i 

Location Jan 00 Feb 00 Mar 00 April 00 May 00
San Jose, CA - Xilinx, Inc.   1-2 1-2
29-30
   

Cost:
$1000

Software & Version:
Foundation 2.1i

Audience
New FPGA User

Prerequisites
Basic knowledge of an HDL language is recommended.

What is the level of the material?
Level I - Beginning

Training Duration
2 days

Content Description
This course was developed specifically to help new users learn how to design successfully with Xilinx devices. During this 2 day course, the Foundation software implementation tools will be used to introduce new users to the essentials of designing with Xilinx FPGAs. Using our latest released software students will learn the basic FPGA architecture, designing techniques, and how to implement an FPGA design. The course highlights the Virtex device, but also applies to the Spartan and XC4000 device families.

Objectives
After completing this training, student will be able to:

  • Describe the basic architecture of an FPGA
  • Create an FPGA design using schematics or HDL
  • Implement an FPGA design using the default software options
  • Describe basic implementation software options
  • View an FPGA design using the Floorplanner
  • Determine if design goals were met by reading reports
  • Assign pin locations and enter global timing constraints with the Constraints Editor
  • Summarize the FPGA configuration process and board layout issues
  • Search multiple help and documentation resources for information

Topics or Training Outline

Day 1
Course Agenda
Introduction to Xilinx Products
Basic Virtex Architecture
Xilinx Tool Flow
Implementation Lab
Reading Reports
Introduction to FPGA Design
Schematic Design Entry
Introduction to Efficient Synthesis
Coding Tips for Virtex
Coding Style Lab

Day 2
Global Timing Constraints
Introduction to Timing Analyzer
Timing Constraints Lab
LogiBLOX and Core Generator
Implementation Options
Viewing Your Design with the Floorplanner
Implementation Options Lab
FPGA Configuration
Board Layout
Help Resources
Course Summary

References
Virtex data sheets, Design Manager / Flow Engine Guide, various application notes on the web, online help for Foundation and Flow Engine.

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