Virtex for the XC4000 Series Users (2.1i)

Location Jan 00 Feb 00 Mar 00 April 00 May 00
Xilinx - San Jose, CA          

Cost:
$ 500

Software & Version:
Foundation 2.1i and Alliance 2.1i

Audience
Audience has some knowledge of the Implementation Tools or has taken the Getting Started course.

Prerequisites
It is recommended that students understand the role of the Implementation Tools or their design flow.

What is the level of the material?
Level I - Beginner

Training Duration
1 day

Content Description
This course describes the Virtex device resources and some of the applications that lend themselves to Virtex. This course does not describe the uses of the Implementation Tools.

Objectives
After completing this training, the student will be able to:

  • Improve their design performance and device utilization by using the appropriate architectural resources
  • Properly instantiate the architectural resources in their HDL
  • Use the Virtex CLB, memory, DLL, Select I/O and routing resources in specific design applications

Topics or Training Outline

  • Introduction
  • CLB Resources
  • Routing Resources
  • Memory Resources
  • Select I/O
  • DLL
  • Virtex-E Family
  • Summary

References
Refer to the Virtex 2.5V Field Programmable Gate Arrays and the Virtex-E 1.8V Field Programmable Gate Arrays data sheets at http://www.support.xilinx.comInternet Link.

Teaching Activities
Structured Discussion x
Paper exercise(s) x
Lab exercise(s) x
Demo
Review questions x
Test x

Instructor-led presentation of the Virtex modules.

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