Software & Version:
N/A

Audience:
FPGA or PC-Board designer using Xilinx FPGAs. Focused on designers who are new to high-speed design. 

Prerequisites:
None

What is the level of the material?
Level I - Beginning

Training Duration:
1 hour

Content Description:
This module focuses on recommended solutions for board layout issues such as ground bounce and mixed voltage systems, focusing on Xilinx FPGAs.

Objectives:
After completing this training, student will be able to:

• Plan a device pinout to minimize ground bounce caused by simultaneously switching outputs (SSO)
• Allocate sufficient decoupling capacitors for a Xilinx FPGA
• Identify potential issues in mixed voltage systems
• Apply the thermal data supplied by Xilinx to determine when fans or heat sinks will be needed  

Topics or Training Outline:

SSO and ground bounce
Decoupling capacitors 
Mixed voltage systems
Thermal characteristics of FPGAs 

References:
App notes XAPP045, XAPP080, and XAPP088.