Timing Analyzer I v2.1i  

Software & Version:
Foundation 2.1i or Alliance 2.1i

Audience:
Audience has no FPGA design experience.

Prerequisites:
Audience needs to understand basic FPGA architecture and have completed Timing Constraints I.

What is the level of the material?
Level I - Beginning

Training Duration:
1 hour

Content Description:
This training material teaches the basic uses of the Timing Analyzer in understanding design performance.

Objectives:
After completing this training, student will be able to:

  • Determine their design performance with the Timing Analyzer
  • Explain how choosing a different Timing Report can provide different timing information
  • Describe the Summary Information available in each Timing Report,
    Improve their critical path delays 

Topics or Training Outline:

Timing Analyzer Reports
Summary Information 
Using the Timing Analyzer to improve critical path delays

References:
Refer to the Timing Analyzer Guide available from the Documentation CD or the Library tab at http://www.support.xilinx.com.