Language Concepts with Verilog HDL

Software & Version
N/A

Audience
Beginning to first year Verilog HDL users.

Prerequisites
Basic Digital Design & simulation concepts.

What is the level of the material?
Level I - Beginning

Training Duration
1 hour

Content Description
Basic introduction to the language: Keywords, operators, expressions, busses, data types, etc.

Objectives
After completing this training, student will be able to:

• Create a basic block of hierarchy (module).
• Define the differences between different data-types.
• Create a bus of a specific size and data-type.
• Assign One data-type to another.

Topics or Training Outline

Keywords & Identifiers
Operators
Numerical representations, sized & unsized numbers
Data types, signal values & signal strengths
Integers, decimal, reg, & wire data types
Bus representations

Supporting Files
None

References
None

Teaching Activities
Structured Discussion x
Paper exercise(s) x
Lab exercise(s) x
Demo
Review questions x
Test