Hardware Modeling Overview v2.1i (VHDL)

Software & Version:
N/A

Audience
New and first year VHDL users, anyone considering VHDL for design.

Prerequisites
Basic digital design concepts, schematic capture & simulation flows.

What is the level of the material?
Level II - Intermediate

Training Duration
1 Hour

Content Description
This "Hardware Modeling Overview" module teaches the history and application of the IEEE 1076 standard. It covers the language origin while discussing the technology specific limitations.

Objectives
After completing this training, student will be able to:

• Discuss the VHSIC initiative.
• Define the terms 'Behavioral' and 'RTL'.
• Define the terms 'Inference' and 'Instantiation'.
• Define Hardware Modeling 'Levels of Abstraction'.

Topics or Training Outline

Origin of VHDL
Top Down Design
Levels of Abstraction
Simulation Vs. Synthesis
Inference Vs. Instantiation
FPGA Challenge