Signals and Datatypes
v2.1i (VHDL)
Software & Version:
N/A
Audience
New and first year VHDL users, anyone considering VHDL for design.
Prerequisites
Basic digital design concepts, schematic capture & simulation flows.
What is the level of the
material?
Level II - Intermediate
Training Duration
1 Hour
Content Description
This "Signals & Datatypes" module covers the most widely
used data-types for VHDL. It stresses the importance of data-type structures
and restrictions for each type. It discusses how to use 'enumerated' data-types
to enhance code readability.
Objectives
After completing
this training, student will be able to:
- Declare ports and signals
using appropriate data-type.
- Define all possible values
for each data-types.
- Declare 'array' for composite
data-types.
- Assign to 'array' or 'scalar'
object.
- Create and use 'enumerated'
data-type.
Topics or Training Outline
Scalar Types
Composite Types
Enumerated Types
Aggregates
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