Xilinx Tool Flow v2.1i

Audience
New Xilinx user

Prerequisites
None

What is the level of the material?
Level I - Beginning

Training Duration
1/2 hour

Content Description
The Tool Flow module provides basic information about the Xilinx tools and how they are used to implement a design.

Objectives
After completing this training, student will be able to:

• Describe the Xilinx tool flows for Foundation schematic, Foundation HDL, and Alliance designs
• Implement a simple FPGA design using default software options 

Topics or Training Outline

Tool flow overview
Implementing a Foundation schematic design
Implementing a Foundation HDL design
Implementing an Alliance design