Software & Version:
Foundation 1.5i or Alliance 1.5I

Audience:
Audience has no FPGA design experience.

Prerequisites:
Audience needs to understand basic FPGA architecture and have completed Timing Constraints 1.

What is the level of the material?
Level I   - Beginning 

Training Duration:
1 hour

Content Description:
This training material teaches the basic uses of the Timing Analyzer in understanding design performance 

Objectives:
After completing this training, student will be able to:

• Enable the designer to determine their design performance with the Timing Analyzer
• Explain how choosing a different Timing Report can provide different information
• Describe the Summary Information available in each Timing Report
• Learn some basic ways to improve your Delay Paths

Topics or Training Outline:

• Timing Analyzer Reports
• Summary Information
• Using the Timing Analyzer to improve delay paths

References:
Refer to the Timing Analyzer Reference/User Guide available from the Documentation CD.