How do I access special IOB components in FPGA Express?

The Spartan-II architecture has special SelectI/O components that allow users to specify the voltage standards each pin must have. These special IOB components exist in the FPGA Express synthesis library but must be instantiated in your HDL code. The components are IBUF, IBUFG, IOBUF and OBUF, and the names are followed by an underscore and then the voltage standard. For example: IBUF_GTL, IBUFG_PCI66_3, IOBUF_HSTL_IV, OBUF_LVCMOS2. A complete list of components understood by FPGA Express can be found in the \lib\virtex directory under the FPGA Express tree (%XILINX%\synth for Foundation users). FPGA Express will understand these components and will not attempt to place any I/O logic on these ports:

Warning: Existing pad cell '/ver1-Optimized/U1' is connected to the port 'clk' - no pads cells inserted at this port. (FPGA-PADMAP-1)

FPGA Express does not merge flip flops into IOBs for the Spartan-II Family. Therefore, you have two options if you wish to have this done; use the map -pr switch to globally (for inputs, outputs, or both) merge flip-flops into IOBs, or instantiate library primitives (FDCE, FDPE) and attach the IOB=TRUE attribute in your HDL code. See Xilinx Solution 4392 for more information about attribute passing in FPGA Express. FPGA Express 4.0 will add the ability to set these voltage standards from within the Constraints Editor.

See Answers Database.