Mapping Constraints
Force logic into the same CLB.
- Sometimes MAP doesn’t make the best decisions. This allows the user to map logic together.
Syntax
INST state_reg_1 BLKNM=STATE1;
INST state_reg_2 BLKNM=STATE1;
INST my_FMAP_logic BLKNM=STATE1; #Can constrain FMAPs but not gates
This will force my_FMAP, state_reg_1, state_reg_2, and into the same CLB (“STATE1”).
Note: The remaining resources are still
up for grabs by MAP (in this case, one
of the FG’s is still available).