An editor's glance at the XC4000XV FPGA family
Xilinx XC4000XV series doubles the capacity of the programmable logic industry
Intro
Key features of the industry's highest density FPGA:
Product availability:
Package options:
Configuration solutions:
Software support:
Intro
The XC4000XV FPGA family represents the first products produced from the joint venture with United Microelectronics Corporation in Taiwan. The process is a second generation of the Xilinx 0.25-micron process building on the first generation 0.25-micron process Xilinx announced last year. This FPGA family ranges in density from 110,000 to 500,000 system gates and 2.5 volt core operation and is a density extension of the industry's single most successful FPGA architecture, the XC4000 series, since inception in 1992.
Key features of the industry's highest density FPGA:
- 500,000 system gates
- system performance of over 100 MHz
- 2.5-volt internal operation with 3.3-volt I/Os for compatibility with existing voltage standards
- second generation 0.25 micron process with five layers of metal
- actual drawn gate length of 0.22 micron
- footprint compatible with the XC4000XL family
Product availability: | Logic cells | System gates | Maximum I/Os | Price * | low volume Availability |
XC40110XV-09 (PQ 240) | 9,728 | 75k - 200k | 448 | $132 | 98Q4 |
XC40150XV-09 (PQ240) | 12,312 | 100k - 300k | 448 | 198 | now |
XC40200XV-09 (BG432) | 16,758 | 130k - 400k | 448 | 288 | 98Q4 |
XC40250XV-09 (BG432) | 20,102 | 180k - 500k | 448 | 403 | 98Q4 |
* Pricing for 100,000-plus unit quantities in mid-1999
Package options:
240-pin Quad Flat Pack(QFP) 352-pin, 432-pin, 560-pin ball grid array (BGA)
559- pin Pin Grid Array (PGA) One mm ball grid array (BGA)
Configuration solutions:
The Xilinx XC1704L and XC1702L SPROM in 44-pin very thin quad flat packages (VQ44) support these higher density devices
- The XC1704L is the largest SPROM for FPGAs in the industry in serial configuration bit size-only 2 Mb and 4 Mb SPROM offerings in the industry
- easiest to design as FPGA designer generates and downloads the bitstream
- lowest cost configuration solution for FPGA designers
~ saves board space because there is only one part
~ does not require customers to do a process/logic/flash combination solution
Software support:
Available now in the latest version, version 1.5, both the Foundation and Alliance Series software
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