The Configuration Problem Solver

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Boundary Scan has been invoked.

From the moment of power-up Boundary Scan (JTAG) operations are available within the FPGA. These operations may be inadvertently invoked by movement on the TCK Pin. This could result in taking the FPGA out of configuration mode. Verify that the TMS is high and that the TCK is not moving. If your application uses a free running clock on TCK then be sure that TMS is a strong logic `1' and recycle the PROG Pin to restart configuration.