The Configuration Problem Solver

The Mode Pins are set incorrectly.

    To configure in the Slave Serial Mode the MODE Pin must be a logic high <1>. While this pin uses the TTL standard threshold values (VIHmin=2.4 Volts) make sure that these pins show a good strong logic `1' (4~5 Volts). Measure the MODE pin at the actual FPGA package to insure there aren't any connection errors on the board. If this pin was left unconnected add an external pullup resistor. Although Xilinx FPGAs have an internal pullup resistor on the MODE pin, the strength of this pullup is not tested.

HISTORY
Family: SPARTAN
Mode: Slave Serial
DONE: LOW
INIT: HIGH
LDC: LOW
DOUT: NO