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The Configuration Problem Solver
The Data Pins D<7:0> are not connected to the board correctly.
Though it is probably unlikely that all 8 Data pins are connected incorrectly, or that only one or a few are without causing a DataFrame Error (INIT goes Low), these conditions could be the result of no configuration data getting to the FPGA. Probe the Data pins directly at the FPGA package pins. Verify that the configuration data is reaching the FPGA's pins. Probing a trace or the data source is not proof positive that the data is reaching the FPGA. |
HISTORY |
Family: XC5200 |
Mode: Master Parallel |
DONE: LOW |
INIT: HIGH |
ADD: YES |
LDC: LOW |
DOUT: NO |